Improved interfacial and electrical properties of GaAs metal-oxide-semiconductor capacitors with HfTiON as gate dielectric and TaON as passivation interlayer

Abstract

The interfacial and electrical properties of sputtered HfTiON on sulfur-passivated GaAs with or without TaON as interfacial passivation layer (IPL) are investigated. Experimental results show that the GaAs metal-oxide-semiconductor capacitor with HfTiON/TaON stacked gate dielectric annealed at 600 C exhibits low interface-state density (1.0 Â 10 12 cm À2 eV À1), small gate leakage current (7.3 Â 10 À5 A cm À2 at V g ¼ V fb þ 1 V), small capacitance equivalent thickness (1.65 nm), and large equivalent dielectric constant (26.2). The involved mechanisms lie in the fact that the TaON IPL can effectively block the diffusions of Hf, Ti, and O towards GaAs surface and suppress the formation of interfacial As-As bonds, Ga-/As-oxides, thus unpinning the Femi level at the TaON/GaAs interface and improving the interface quality and electrical properties of the device. V

Interfacial and electrical properties of InGaAs metal-oxide-semiconductor capacitor with TiON/TaON multilayer composite gate dielectric

“…It can be obviously seen that the accumulation capacitance drops for the TaON/TiON/InGaAs sample under large positive gate voltage due to large leakage current, which probably comes from a high density of defective states at the conduction-band edge of InGaAs caused by a considerable amount of In-/Ga-/As-O and As-As bonds at the TiON/InGaAs interface. 10,13 However, for the TiON/TaON/ InGaAs sample, the accumulation capacitance exhibits a quasi-saturation as the positive gate voltage increases, which should be ascribed to the improved interfacial properties associated with the suppressed growth of a unstable low-k interfacial layer (In/Ga/As oxides) at the InGaAs surface achieved by the ultrathin TaON IPL on the InGaAs surface, as confirmed by the XPS analysis below. The interface-state density (D it ) at midgap extracted from the 1-MHz C-V curve is 1.0 Â 10 12 cm À2 eV À1 for the TiON/TaON/InGaAs sample by using the Terman's method and is much lower than that for the TaON/TiON/InGaAs sample (7.1 Â 10 12 cm À2 eV À1 ).…”

“…Ta-based oxynitride (TaON) with a higher k value ($26) than HfO 2 has been used in GaAs MOSFETs and showed excellent electrical and reliability properties. 10 Ti-based oxynitride (TiON) has an even higher k value ($80) but larger leakage current. 9 Moreover, it has been demonstrated that the TaO-TiO multilayer structure as gate dielectric on Si and Ge substrates has excellent electrical properties.…”

Modulating the Interface Quality and Electrical Properties of HfTiO/InGaAs Gate Stack by Atomic-Layer-Deposition-Derived Al2O3 Passivation Layer

“…On the basis of Figure 10a, it can be noted that HfTiO/InGaAs sample with Al 2 O 3 passivation layer demonstrates a smaller hysteresis voltage than that of HfTiO/ InGaAs sample without Al 2 O 3 passivation layer, implying fewer slow states in the dielectric and near/at the interface due to the reduction of Ga and As diffusions in the sample with Al 2 O 3 passivation layer. 44 For HfTiO/InGaAs gate stack, the C−V curve displays an accumulation region at higher positive voltages attributed to the steady-state nonequilibrium conditions for semiconductors with wide band gap. 44 However, for HfTiO/Al 2 O 3 /InGaAs system, the accumulation and the depletion regions are detected, suggesting that the introduced Al 2 O 3 control layer prevents the formation of gallium and arsenic oxides and thus the generation of surface states from the interface has been controlled.…”

“…44 For HfTiO/InGaAs gate stack, the C−V curve displays an accumulation region at higher positive voltages attributed to the steady-state nonequilibrium conditions for semiconductors with wide band gap. 44 However, for HfTiO/Al 2 O 3 /InGaAs system, the accumulation and the depletion regions are detected, suggesting that the introduced Al 2 O 3 control layer prevents the formation of gallium and arsenic oxides and thus the generation of surface states from the interface has been controlled. The suppression of the formation of low-k interface layer leads to high accumulation capacitance compared to directly deposited HfTiO.…”

Passivation of oxide traps in gallium arsenide (semiconductor) metal-oxide-semiconductor capacitor with high-k dielectric by using fluorine incorporation

“…However, a major concern of fabricating GaAs MOS device is that unstable native oxides are easily formed on the surface of the GaAs substrate, thus decreasing the effective k value of the gate dielectric and inducing high interface-state density (D it ) to pin the Fermi level at the gate-dielectric/ GaAs interface. 10 Various interlayers made of Si, 11 Ge, 12 ZnO, 13 AlON, 14 TaON, 15 etc., have been tried in order to solve this problem and good results have been obtained. Besides, fluorine incorporation was reported to be capable of passivating the oxygen vacancies of high-k materials, 16 and so should be another good way for passivating the GaAs surface with simpler processing than the use of an interlayer.…”