Improved Retention Characteristics of Metal-Ferroelectric-Insulator-Semiconductor Structure Using a Post-Oxygen-Annealing Treatment

Kodama, Kazushi; Takahashi, Mitsue; Ricinschi, Dan; Lerescu, Alexandru Ionut; Noda, Minoru; Okuyama, Masanori

doi:10.1143/jjap.41.2639

Cited by 20 publications

(6 citation statements)

References 3 publications

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“…1) The crystal structure and phase transitions of SBT crystal have been studied and discussed. [2][3][4] The formation processes of SBT thin films have been widely researched, [5][6][7][8][9][10][11][12][13][14] and also the crystallization of the SBT film 5,[15][16][17] and its grain growth 18) have been investigated. Although the crystal structure of ferroelectric SBT is orthorhombic with the space group A2 1 am (Bi-layered Aurivillius phase), 19) it is a serious problem that the fluorite-type phase (space group: Fm3m) easily grows at a low temperature.…”

Section: Introductionmentioning

confidence: 99%

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film

Kohno

Sakamoto

Matuo

2005

Jpn. J. Appl. Phys.

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Crystal phase and structural properties in sub-100-nm-thick SrBi2Ta2O9 (SBT) thin films deposited on silicon substrates have been quantitatively investigated by X-ray diffraction (XRD) and X-ray reflection (XRR) analyses. The simulation fitting of XRR showed that the density and the surface roughness of the SBT film increased and saturated as the annealing temperature increased, indicating the phase transformation from fluorite to Aurivillius and the grain growth were enhanced by the high-temperature annealing. The SBT film was composed of small crystals of fluorite-type and Bi-layered Aurivillius phase after crystallization at temperatures of 730–785°C for 1 h. When annealing temperature was higher than 800°C, the film crystallized into a single phase of Bi-layered Aurivillius. It was also shown that the average crystal size in the SBT film increased with annealing temperature and saturated to be ∼75 nm at annealing temperatures higher than 800°C. The annealing temperature dependence of the integrated intensity of the diffraction suggested that the activation energy of the crystallization into the Aurivillius phase was significantly changed at ∼800°C. The change in the activation energy had a close relationship with the structural phase transformation of fluorite to Aurivillius and the grain growth.

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Section: Introductionmentioning

confidence: 99%

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film

Kohno

Sakamoto

Matuo

2005

Jpn. J. Appl. Phys.

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“…Nevertheless, these devices exhibited very short retention time up to now, except for the case of epitaxial growth of the stacked ZnO/PZT/SrRuO 3 structure by pulsed laser processing [6,12]. The main causes of the short retention time have widely been approved to be the effect of depolarization field from an interlayer and leakage current in the ferroelectric film on the Si surface channel [13][14][15][16][17][18]. In recent, the directly stacked oxide semiconductor/ferroelectric structure using pulsed laser processing is considered to be effective for forming a "clean" interface [6,12,19].…”

Section: Introductionmentioning

confidence: 99%

Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor

Tue

Miyasako

Tokumitsu

et al. 2013

Advances in Materials Science and Engineering

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We adopted a lanthanum oxide capping layer between semiconducting channel and insulator layers for fabrication of a ferroelectric-gate thin-film transistor memory (FGT) which uses solution-processed indium-tin-oxide (ITO) and lead-zirconium-titanate (PZT) film as a channel layer and a gate insulator, respectively. Good transistor characteristics such as a high “on/off” current ratio, high channel mobility, and a large memory window of 108, 15.0 cm2 V−1 s−1, and 3.5 V were obtained, respectively. Further, a correlation between effective coercive voltage, charge injection effect, and FGT’s memory window was investigated. It is found that the charge injection from the channel to the insulator layer, which occurs at a high electric field, dramatically influences the memory window. The memory window’s enhancement can be explained by a dual effect of the capping layer: (1) a reduction of the charge injection and (2) an increase of effective coercive voltage dropped on the insulator.

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“…However, the metal-ferroelectric(-insulator)-semiconductor [MF(I)S]-FET 1) still has, in most cases, a short memory retention time even up to now, although some devices have a long retention time. The reasons for the short memory retention times have long been discussed 2) and the main factors are the effect of depolarization field and leakage current in the ferroelectric film of the MF(I)S junctions on the Si surface channel.…”

Section: Introductionmentioning

confidence: 99%

Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction

Lee¹,

Minami²,

Kanashima³

et al. 2006

Jpn. J. Appl. Phys.

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A new type of ferroelectric gate field-effect transistor (FET) using ferroelectric-insulator interface conduction has been proposed. Drain current flows along the interface between the ferroelectric and insulator layers and requires no semiconductor. The channel region of the FET is composed of a Pt/insulator HfO 2 /ferroelectric Pb(Zr 0:52 Ti 0:48 )O 3 (PZT)/Pt/TiO 2 /SiO 2 /Si multilayer, and the source and drain areas are formed at the interface of the PZT and HfO 2 films. Drain current versus gate voltage characteristics show a clockwise hysteresis loop similar to that for a conventional p-channel transistor. The FET shows that the on/off ratio of the conduction current is within 10 5 to 10 6 and that the off-state current is about 10 À10 A.

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Improved Retention Characteristics of Metal-Ferroelectric-Insulator-Semiconductor Structure Using a Post-Oxygen-Annealing Treatment

Cited by 20 publications

References 3 publications

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film

Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor

Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction

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Improved Retention Characteristics of Metal-Ferroelectric-Insulator-Semiconductor Structure Using a Post-Oxygen-Annealing Treatment

Cited by 20 publications

References 3 publications

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi2Ta2O9 Thin Film

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi2Ta2O9 Thin Film

Effect of Coercive Voltage and Charge Injection on Performance of a Ferroelectric-Gate Thin-Film Transistor

Fabrication and Characterization of Ferroelectric Gate Field-Effect Transistor Memory Based on Ferroelectric–Insulator Interface Conduction

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Product

Resources

About

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film

Crystallization and Structural Phase Transformation in Sub-100-nm-Thick SrBi₂Ta₂O₉ Thin Film