Improvement in the determination by 1/f noise measurements of the interface state distribution in polysilicon thin film transistors in relation with the compensation law of Meyer Neldel

Abstract

Erratum: "Effect of excimer laser annealing on the structural and electrical properties of polycrystalline silicon thin-film transistors" [J.Electrical and noise properties of thin-film transistors on very thin excimer laser annealed polycrystalline silicon films Appl.Low-frequency ͑1 / f͒ noise is studied in N-channel furnace solid phase crystallized ͑FSPC͒ and in laser solid phase crystallized ͑LSPC͒ polysilicon thin film transistors ͑TFTs͒ biased from weak to strong inversion. Noise analysis is supported by the theory of charge carrier trapping/detrapping at the interface tunneling into gate oxide traps. The distribution of interface trap states ͑N T ͒ is deduced from the number of carriers trapped into the oxide. Noise measurements for devices biased from weak to moderate inversion allow the determination of the distribution of deep level trap states associated with dangling bond-type defects ͑N Tdb ͒, whereas measurements from moderate to strong inversion give the distribution of shallow level trap states ͑N Tts ͒ associated with strained bond defects. The noise analysis clearly shows that the slope of both exponential distributions equals to the reverse of the Meyer Neldel energy E MN ͑0.035 and 0.055 eV for FSPC and LSPC TFTs, respectively͒. For LSPC devices the resulting distribution of interface states ͑N T = N Tdb + N Tts ͒ is one decade lower and it is attributed to the effects of the laser annealing on the active layer crystal quality.

Scaling Down Effect on Low Frequency Noise in Polycrystalline Silicon Thin-Film Transistors

“…In addition, the LFN may up-convert to high frequencies which is a considerable contributor to phase noise, and then adversely affecting the operation of poly-Si TFTs in analog and RF applications [5], [7]. The low frequency noises in poly-Si TFTs have been measured and analyzed by many groups [8]- [12]. According to localized states in the grain boundary [13], [14], the noise levels in poly-Si TFTs are higher than those observed in crystalline silicon MOSFETs.…”

Experimental validation of the exponential localized states distribution in the variable range hopping mechanism in disordered silicon films

“…2,3 Methods based on capacitance, resistivity, conductance activation energy, and low frequency noise measurements exist to determine these distributions. [4][5][6][7] The corresponding energy distribution of the states (DOS) is representative of the crystal quality of the material, thus of the fabrication parameters, and many studies have been devoted to the determination of the DOS used as diagnostic tool.…”

Low-frequency noise in downscaled silicon transistors: Trends, theory and practice

“…Third, the lowfrequency noise in MOS transistors is higher than the noise in BJTs, as one can see in Figure 15. In this figure, the data are for 134 nMOS transistors from [22,47,48,49,50,51,72,86,87,88,89,90,91,92,93,94,95,96,97,98,99,100,101,102,103,104,105,106,107,108,109,110,111,112,113,114,115,116,117,118,119,120,121,122,123], and for 53 pMOS transistors from [47,52,86,…”

“…, for MOS transistors with correlated ∆n-∆µ fluctuation, (121) where the mobility degradation parameter θ may vary in sign, magnitude and with bias, depending on type of trapping and scattering mechanism in MOS transistor, e.g. Coulomb, remote, surface, phonon scattering and screening of charge of the inversion layer [47,48,49,50,51,52,53,54,55,56,57,58,72,89,110,124,137], but θ is usually taken as a constant in one transistor, because of the following reasons.…”