Proceedings of the 16th ACM/IEEE International Symposium on Low Power Electronics and Design 2010
DOI: 10.1145/1840845.1840899
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In-situ power monitoring scheme and its application in dynamic voltage and threshold scaling for digital CMOS integrated circuits

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Cited by 8 publications
(2 citation statements)
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“…Therefore, it can be treated as a resistor with anon-resistance of R sleep . A concurrent study reported in [8] also attempts to utilize this voltage drop to proportionally integrate a capacitor and provide a quantized two-bit output. However, this two-bit output of the monitor may increase the number of iterations the power management loop has to go through before converging to the optimal operating point.…”
Section: On-chip Power Sensormentioning
confidence: 99%
“…Therefore, it can be treated as a resistor with anon-resistance of R sleep . A concurrent study reported in [8] also attempts to utilize this voltage drop to proportionally integrate a capacitor and provide a quantized two-bit output. However, this two-bit output of the monitor may increase the number of iterations the power management loop has to go through before converging to the optimal operating point.…”
Section: On-chip Power Sensormentioning
confidence: 99%
“…Hence, by controlling the period of the sleep control signal we can modulate the spectral behavior of the generated power patterns. The on-chip power monitors can be used to sense the core level power [27]. Application Driven Power Spectra: The second approach is to run multiple test applications in individual cores and measure power and temperature to compute the filter response.…”
Section: Thermal System Identification For Many-corementioning
confidence: 99%