Indium channel implant for improved short-channel behavior of submicrometer NMOSFETs

Shahidi, G.; Davari, B.; Bucelot, T.; Ronsheim, P.; Coane, P.; Pollack, S. A.; Blair, C.; Clark, Bill; Hansen, H.

doi:10.1109/55.225595

Cited by 72 publications

(20 citation statements)

References 8 publications

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“…Recently, for NMOSFET's, Indium, as an alternative to low-energy Boron, has demonstrated superior performance for the suppression of short channel effect thanks to its strong retrograde profile [1,2]. In addition, it was also demonstrated [3] that the carrier freeze-out due to the deep acceptor level of Indium was not a concern in the case of enhanced mode device operation.…”

Section: Introductionmentioning

confidence: 99%

<title>Comprehensive study of indium-implantation-induced damages in 0.25-um MOSFETs</title>

Liao¹,

Lim²,

Lowrie³

et al. 2000

SPIE Proceedings

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In this paper, an investigation of the DC characteristics of 0.25 jim indium-implanted MOSFET's concerning on indium implantation induced damages is presented. The experimental data indicates that the devices with indium-implanted channel tend to show increases in device leakage current, which could be attributed the indium implantation induced damages. The impact of the Indium implantation on the degradation of device performance was investigated through detailed studies of device I-V characteristics, and the measurement results are found to correlate well with the variations in the process conditions. Our findings indicate that the elimination of the implantation-induced damages by post implantation annealing is particularly important for deep sub-micron MOSFET's using indium implantation.

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Section: Introductionmentioning

confidence: 99%

<title>Comprehensive study of indium-implantation-induced damages in 0.25-um MOSFETs</title>

Liao¹,

Lim²,

Lowrie³

et al. 2000

SPIE Proceedings

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show abstract

“…Indium was recommended for fabricating steep retrograde channel profiles due to the heavy ion atom and the strong segregation to oxide [1]- [3], and shallow source-drain extensions with pre-amorphization for the dechanneling [4], [5]. For indium pocket profiling, two approaches, that is, low-dose tilted ion implantation [6] and high-dose ion implantation [7], have been explored.…”

Section: Introductionmentioning

confidence: 99%

Double pocket architecture using indium and boron for sub-100 nm MOSFETs

Odanaka

Hiroki

Yamashita

et al. 2001

IEEE Electron Device Lett.

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A double pocket architecture for sub-100 nm MOSFET's is proposed on the basis of indium pocket profiling at higher dose than the amorphization threshold. At high dose, the low-energy indium pockets realize the improvement of short channel effects and shallow extension formation of highly doped drain, maintaining the low junction leakage level. Double pocket architecture using indium and boron is demonstrated in a 70 nm gate length MOSFET with high drive currents and good control of the short channel effects.

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“…Therefore, as the channel length is scaled to 0.1 m and below, the doping concentration must be raised to values of cm . Such high bulk-impurity concentrations lead to an increase of threshold voltage and to an electron mobility decrease, which strongly degrades the electric properties of the device [8]- [10].…”

mentioning

confidence: 99%

“…To solve these problems, the use of nonuniform doping concentrations has recently been suggested: boron implant [10], indium-channel implant [12], silicon-epitaxial growth on heavily doped substrates [4], and delta-doped MOSFET's [13].…”

mentioning

confidence: 99%

Study of the effects of a stepped doping profile in short-channel MOSFETs

López‐Villanueva

Gamiz

Roldán

et al. 1997

IEEE Trans. Electron Devices

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Abstract-The performance of a stepped doping profile for improving the short-channel behavior of a submicrometer MOS-FET has been analyzed in detail by using a quasi-two-dimensional (quasi-2-D) MOSFET simulator including inversion-layer quantization coupled with a one-electron Monte Carlo simulation. Several second-order effects, such as mobility degradation both by bulk-impurity and interface traps, carrier-velocity saturation, and channel-length modulation, have been included in the simulator. Very good agreement between experimental and simulated results are obtained for short-channel transistors. It has been shown that including a low-doped zone of convenient thickness next to the interface over a high-doping substrate improves both the electron mobility and the threshold voltage of the device, while avoiding short-channel effects. The use of simulation has allowed us to study certain kinds of devices without needing to make them.

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Indium channel implant for improved short-channel behavior of submicrometer NMOSFETs

Cited by 72 publications

References 8 publications

<title>Comprehensive study of indium-implantation-induced damages in 0.25-um MOSFETs</title>

<title>Comprehensive study of indium-implantation-induced damages in 0.25-um MOSFETs</title>

Double pocket architecture using indium and boron for sub-100 nm MOSFETs

Study of the effects of a stepped doping profile in short-channel MOSFETs

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