2018
DOI: 10.1016/j.apmt.2018.03.003
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Inducing tunable switching behavior in a single memristor

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Cited by 24 publications
(31 citation statements)
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“…α ‐STO of 55 nm thickness was deposited by radio frequency (RF) sputtering (Kurt J. Lesker PVD75 sputtering system) in 100% Ar atmosphere at a process pressure of 3.5 × 10 −7 Torr at room temperature from a commercial ceramic STO target (99.95%, Testbourne Ltd) using 200 W RF (13.54 MHz). [ 39,40 ] The bottom Pt (25 nm) on Ti (7 nm) and top Pt (100 nm) on Ti (10 nm) were deposited at a rate of 0.3 Å s −1 by electron beam evaporation.…”
Section: Methodsmentioning
confidence: 99%
“…α ‐STO of 55 nm thickness was deposited by radio frequency (RF) sputtering (Kurt J. Lesker PVD75 sputtering system) in 100% Ar atmosphere at a process pressure of 3.5 × 10 −7 Torr at room temperature from a commercial ceramic STO target (99.95%, Testbourne Ltd) using 200 W RF (13.54 MHz). [ 39,40 ] The bottom Pt (25 nm) on Ti (7 nm) and top Pt (100 nm) on Ti (10 nm) were deposited at a rate of 0.3 Å s −1 by electron beam evaporation.…”
Section: Methodsmentioning
confidence: 99%
“…For this reason, a few recent studies demonstrated TS based on amorphous vanadium oxide ( a ‐VO x ). However, due to the amorphous nature of the film, devices based on same stoichiometry of vanadium oxide show multifunctional memory behavior, which is not desirable for the practical application.…”
Section: Introductionmentioning
confidence: 99%
“…Crystalline VO 2 (c-VO 2 ) as TS element shows significant OFF-current, [12,13] which defeats its primary purpose as a selector. However, due to the amorphous nature of the film, devices based on same stoichiometry of vanadium oxide show multifunctional memory behavior, [17] which is not desirable for the practical application. However, due to the amorphous nature of the film, devices based on same stoichiometry of vanadium oxide show multifunctional memory behavior, [17] which is not desirable for the practical application.…”
mentioning
confidence: 99%
“…The Cr: a -STO x based memory cells are fabricated in metal-insulator-metal (MIM) configuration by following the fabrication steps in Ref. [1] , [2] , [5] . In the MIM structure Pt (35 nm)/Ti (8 nm) serves as a top metal electrode, Cr: a -STO x (25 nm) as an insulator and Pt (7 nm)/Ti (3 nm) as a bottom metal electrode.…”
Section: Experimental Design Materials and Methodsmentioning
confidence: 99%
“… The data included in this article provides additional supplementary information on our recent publication describing “Inducing tunable switching behavior in a single memristor” [1] . Analyses of micro/nano-structural and compositional changes induced in a resistive oxide memory during resistive switching are carried out.…”
mentioning
confidence: 99%