We have investigated the electrical properties of lateral pn junctions formed by Si-doped GaAs MBE growth over a patterned GaAs substrate. Current-voltage and capacitance-voltage profiling have revealed dissimilar doping profiles, dependent on the junction location. Junctions located at the lower facet-flat intersection possessed an abrupt profile and exhibited good rectifying characteristics with ideality factors (q) of approximately 2. Those situated at the upper facet-flat boundary tended towards linearly graded and displayed poor rectifying properties, with q > 2. The evolution of different minor facets at both lower and upper intersections and silicon doping behaviour on these respective surfaces is proposed as a means of explaining the differences in performance of the junction types. A dip formation present on the facet has been identified as being a cause of the poor rectification performance.