We report the observation of a metal-insulator transition (MIT) in a two-dimensional electron gas (2DEG) in a Si/SiGe heterostructure at zero magnetic field. On going through the MIT we observe the corresponding evolution of the magnetic field induced transition between the insulating phase and the quantum Hall (QH) liquid state in the QH regime. Similar to the previous reports for a GaAs sample, we find that the critical magnetic field needed to produce the transition becomes zero at the critical electron density corresponding to the zero field MIT. The temperature dependence of the conductivity in a metallic-like state at zero field is compared with the theory of the interaction corrections at intermediate and ballistic regimes kBT τ /h ≥ 1. The theory yields a good fit for the linear part of the curve. However the slope of that part of σxx(T ) is about two times smaller than that reported in other 2D systems with similar values of rs. At the same time, the recent theory of magnetoresistance due to electron-electron interaction in the case of arbitrary kBT τ /h, smooth disorder and classically strong fields does not seem to be quite adequate for the description of the parabolic magnetoresistance observed in our samples. We attribute these results to the fact that neither of these theories deals with the whole scattering potential in a sample but leaves either its long range or its short range component out of consideration.

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The performance of surface channel MOSFET devices depends on the Si/SiO 2 interface quality. The present study has examined the Si/SiO 2 interface of strained Si n-channel MOSFETs fabricated on a Si/SiGe virtual substrate. Evidence of a variation in the oxidation rate of strained Si along the cross-hatch period is presented. The undulating oxide thickness was found to be accompanied by increased nanoscale roughness at the Si/SiO 2 interface for the strained Si surface channel devices compared with conventional MOSFETs. Fluctuations in the strained Si surface channel thickness were additionally caused by the variation in oxidation rate. The control devices exhibited a tighter distribution of electrical characteristics than the strained Si devices due to the non-uniform cross-hatch severity across the Si/SiGe wafer. The results provide strong evidence that significantly enhanced performance of HNMOS surface channel devices is possible through optimization of epitaxial growth methods. Strain in the channel was maintained following device fabrication using a conventional process with a reduced thermal budget.

We have successfully demonstrated the formation of lateral p-n junctions via single-step Si-doped GaAs MBE growth over patterned (110) GaAs substrates. Current-voltage measurements indicate that the quality of the p-n junctions is position dependent; those located at the lower facet-flat boundary displayed superior rectification properties compared with the upper facet-flat junctions. Analysis of the lower junction forward characteristics revealed two types of current transport, each dominant over separate voltage ranges. Under low applied voltage, electron tunnelling via mid-gap states is proposed as the main mechanism, while diffusion and generation-recombination currents appear to dominate the device characteristics at higher voltages. In contrast, only tunnelling conduction was seen in the forward characteristics of the upper junctions. These effects are interpreted as due to compensated incorporation of Si in the region of the junctions, resulting from strong Ga diffusion from the (110) plane to the (100) surface. Series resistance values for the upper and lower junctions are consistent with this model, as are the dependences on growth temperature.

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