Influence of underlying interlevel dielectric films on extrusion formation in aluminum interconnects

Abstract

Effect of low-energy N 2 + ion beam bombardment on silicate glass thin films studied by x-ray photoelectron spectroscopy Knowledge of the mechanical properties of interlevel dielectric films and their impact on submicron interconnect reliability is becoming more and more important as critical dimensions in ultralarge scale integrated circuits are scaled down. For example, lateral aluminum ͑Al͒ extrusions into spaces between metal lines, which become more of a concern as the pitches shrink, appear to depend partially on properties of SiO 2 underlayers. In this article nanoindentation, wafer curvature, and infrared absorbance techniques have been used to study the mechanical properties of several common interlevel dielectric SiO 2 films such as undoped silica glass using a silane (SiH 4 ) precursor, undoped silica glass using a tetraethylorthosilicate precursor, phosphosilicate glass deposited by plasma-enhanced chemical vapor deposition and borophosphosilicate glass ͑BPSG͒ deposited by subatmosphere chemical vapor deposition. The elastic modulus E and hardness H of the as-deposited and densified SiO 2 layers are measured by nanoindentation. The coefficients of thermal expansion ͑CTE͒ of the densified layers are estimated by temperature-dependent wafer curvature measurements. Fourier transform infrared spectroscopy is used to obtain the chemical structures of all SiO 2 layers. Among the four common interlevel layers, BPSG exhibits the smallest modulus/ hardness and a relatively small amount of moisture loss during anneal. The BPSG shows the highest CTE, which generates the smallest thermal stress due to a closer match in the CTE between Al and SiO 2 . BPSG again has the lowest as-deposited compressive stress and the lowest local Si-O-Si strain before annealing. The center frequency of the Si-O bond stretching vibration exhibits a linear dependence on total film stress. The shifts of Si-O peaks for all the SiO 2 layers also correlate well with the stress hysteresis obtained from wafer curvature measurements. Stress interactions between the various SiO 2 underlayers and the Al metal film are also investigated. The impact of dielectric elastic properties on interconnect reliability during thermal cycles is proposed.

Strain Measurements of Silicon Dioxide Microspecimens by Digital Imaging Processing

“…Several studies [18,19] have reported values of Young's modulus via measurement of the thermal stresses in thin films. More recent investigations have measured the elastic constants of silicon dioxide using methods such as nanoindentation [20] and atomic force microscopy [21]. However, none of these measurements are by tensile testing, which is the standard method for determining mechanical properties of structural materials.…”

Atmospheric Pressure Plasma Enhanced Chemical Vapor Deposition of Borophosphosilicate Glass Films

“…The refractive indices and stress levels of these films were very near those of doped silicon oxides deposited by conventional techniques. 13,19) …”

Fast Thermal Cycling-Enhanced Electromigration in Power Metallization

“…This is a compressive stress in the metal line because Al has a larger thermal expansion coefficient than both the dielectric and the substrate. As seen in published data [12], [13], the thermal stress depends on the aspect ratio of the line, the geometry of the interconnect structure, the mechanical properties of the dielectric and the temperature. Its magnitude can be more than 100 MPa.…”

“…As published data shows, low-k dielectrics have a lower fracture resistance compared to conventional dielectrics [3]. Metallization schemes using low-k materials as an interlayer dielectric (ILD) can cause a reliability problem because of an increased chance of cracking of the low-k dielectric due to a compressive stress induced by the EM driving force [4]. In these cases, use of design rules based solely on the open circuit failure mode could result in a less reliable product.…”

“…, and I , respectively, and (1), (4), and (5) are extrusion monitors. (b) Setup for fast thermal cycling preconditioning, (1) is a pulsed current source, (2) is the temperature measurement module (consists of a digital oscilloscope and a dc current source), and (3) is the EM device under test.…”