Typical methods for sub-100 nm compound semiconductor patterning are based on indirect pattern transfer using SiO 2 or SiN 4 as intermediate masks, which inevitably increase the complexity of pattern transfer and cause potential damage to samples. We present an approach of direct pattern transfer using Ti͑OBu n ͒ 4 sol-gel-derived TiO 2 resist as mask. The optimal dose of TiO 2 resist for E-beam lithography is ϳ220 mC/cm 2 . The sample InP compound semiconductor etching selectivity to TiO 2 resist is as high as 9:1 with aspect ratio of over 30:1. Various sub-100 nm scale inductively coupled plasma etching patterns are obtained with a high-quality etching profile. The smallest feature is as small as 20 nm wide with a depth of over 600 nm.Compound semiconductor-based devices have a variety of applications in communications, photonics, and optoelectronics, such as transistors, lasers, diodes, photodetectors, etc. Recently, semiconductor devices with a sub-100 nm scale have been drawing more and more attention due to their high integratability and various unique applications, such as very-large-scale integration, quantum disk confinement structure, and photonic bandgap. 1-4 For those purposes, various instruments and techniques have been developed to reduce the size of compound semiconductor devices to such a small scale.However, currently sub-100 nm patterning of a compound semiconductor is limited by the lithography resist. For example, for InP semiconductor compound etching, the etching selectivity of poly͑methyl methacrylate͒ ͑PMMA͒ is as low as 2-5. 5 In addition, PMMA could not resist high temperatures over 200°C, which is required by chlorine-based InP dry etching to remove the by-product during the etching process. Hence, SiO 2 or SiN 4 are typically used as intermediate masks for indirect pattern transfer. First, nanopatterns are formed on resist using nanolithography. Next, the patterns are transferred to SiO 2 or SiN 4 by dry etching. Finally, after removing the resist and subsequent pattern transfer to the compound semiconductor by etching using intermediate SiO 2 or SiN 4 mask, this intermediate mask has to be removed for the subsequent fabrication process. These additional mask transfer and etching away processes inevitably increase the complexity of InP submicrometer patterning, especially for sub-100 nm size patterns. Therefore, it is desirable to find an easier and effective method of compound semiconductor pattern transfer. One method is to use the recently reported metal oxide nanolithography resist, 6-8 which is expected to have harder structures and higher resistance to temperature and etching chemicals.In this paper, we present a method of sub-100 nm direct pattern transfer of compound semiconductor using sol-gel-derived spincoatable TiO 2 resist as mask. Here, we specifically demonstrate the technique on InP compound semiconductor using inductively coupled plasma reactive ion etching ͑ICP-RIE͒. This technique can be readily extended to GaAs, InGaAs, InGaP, InAlAs, AlGaAs, InGaAsP, and other com...