1991
DOI: 10.1016/0040-6090(91)90089-g
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Injection amplification effect in the metal-ferroelectric-insulator-semiconductor thin film structure

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Cited by 13 publications
(6 citation statements)
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“…The difference between the reported devices and the transistor proposed by Salahuddin [1] is the insertion of a linear dielectric as a buffer layer due to the diffusion of the ferroelectric into the silicon [10]. We should clarify that the surface potential enhancement due to the ferroelectric's negative capacitance effect is entirely different from the amplifying effect on the tunneling current through the gate oxide as a result of the presence of a ferroelectric layer in tunneling read-only memory devices [11][12][13]. The ferroelectric stability condition to obtain the negative capacitance effect for this kind of device has not previously been reported.…”
Section: Introductionmentioning
confidence: 77%
“…The difference between the reported devices and the transistor proposed by Salahuddin [1] is the insertion of a linear dielectric as a buffer layer due to the diffusion of the ferroelectric into the silicon [10]. We should clarify that the surface potential enhancement due to the ferroelectric's negative capacitance effect is entirely different from the amplifying effect on the tunneling current through the gate oxide as a result of the presence of a ferroelectric layer in tunneling read-only memory devices [11][12][13]. The ferroelectric stability condition to obtain the negative capacitance effect for this kind of device has not previously been reported.…”
Section: Introductionmentioning
confidence: 77%
“…The difference between the reported devices and the transistor proposed by Salahuddin [1] is the insertion of a linear dielectric as a buffer layer due to the diffusion of the ferroelectric into the silicon [10]. We should clarify that the surface potential enhancement due to the ferroelectric's negative capacitance effect is entirely different from the amplifying effect on the tunneling current through the gate oxide as a result of the presence of a ferroelectric layer in tunneling read-only memory devices [11][12][13]. The ferroelectric stability condition to obtain the negative capacitance effect for this kind of device has not previously been reported.…”
Section: Introductionmentioning
confidence: 96%
“…The features of hetero‐structures are strongly influenced by interfacial characteristics. The interface‐states density ( D ) of a metal‐insulator‐semiconductor (MIS) structure or metal‐oxide‐semiconductor (MOS) one is an important parameter that changes the behaviors of all devices . There exist interfacial states in hetero‐structures, and there are also many ways to create or decreases the density of interface states .…”
Section: Introductionmentioning
confidence: 99%