Innovated Process Integration for Panel Size Glass Substrate Manufacturing for SiP Application

Abstract

Although Silicon interposer has good performance, however high cost is still the major issue and limits its high volume adoption. Therefore to decrease the assembly cost or develop low cost, high density interconnect interposer technology is the keys to enable 2.5D SiP integration. One possibility is to develop low cost interposer by adopting the alternative materials instead of Silicon. The glass, low CTE polymer material, ceramic, etc. may be included. Glass represents an attractive choice with potential of tailorable properties dependent on specific glass composition. By targeting the coefficient of thermal expansion (CTE), the CTE of glass can be made to match perfectly with silicon dies and for reliable package. In addition, the advantages of using glass for interposer derive from process flexibility for size and thickness since the glass fusion process provides sheets with dimensions of more than three meters. It is straight forward to provide glass substrate of almost any size needed. Large glass panels are ideally suited for fabrication of interposer where the panel process is expected to provide large number of interposers in each run compared with wafer processing. Additionally, the two sided processing of the panel, the avoidance of Si wafer CMP processes further enable lower unit cost for the interposer Consequently, glass is an ideal interposer material due to its insulating property, large panel size availability, high modulus and ability to tailor CTE. In this paper, we successfully demonstrate manufacturing feasibility of glass substrate with 4 build-up layers starting with a thin glass panel in 508mm×508mm panel size format and under the IC substrate manufacturing environment. Glass thickness of 100~300um could be processed through the IC substrate HVM line. The laser via in via or direct metallization technology could be selected for double side electrical connection. The copper line width/space of 8/8um was demonstrated by current substrate HVM line. By adopting advanced lithography process and material, line width/space less than 2/2um was achievable. TCT Reliability test without glass crack results will also be discussed.