Integrated Passive Design Library for Multilayer PCB

Carchon, G.; Vaesen, Kristof; Sun, Xiao Wei; Brebels, S.; Imaoka, Toshikazu; Sawai, Tatsuo; Inoue, Yoshio

doi:10.1109/ectc.2006.1645892

Cited by 7 publications

(1 citation statement)

References 6 publications

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“…Although this approach have been studied for years, but it is still in laboratory stage today due to the challenge of high yield manufacturing. An effective design methodology to compromise performance and manufacturing tolerance in early design stage still has not been well addressed to earn the high yield embedded circuit design [5]- [7] In this study, a Bluetooth/WLAN combo module design by using embedded passives substrate is presented. The design and modeling methodology have been developed to give yield prediction during design stage.…”

Section: Introductionmentioning

confidence: 99%

Design and modeling methodology of embedded passives substrate in a compact wireless connectivity module

Chiu

Lee

Chen

et al. 2011

2011 IEEE 61st Electronic Components and Technology Conference (ECTC)

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A novel wireless connectivity module by using embedded high dielectric constant (Dk) material in a 6 layer build-up substrate to form the passive circuit is presented. The module shows 18% size shrinking while embedded BPF, Balun and Divider circuit. The embedded BPF and Balun show 2 dB and 1 dB insertion loss at passband respectively. An efficient design methodology is demonstrated for high performance and yield prediction. It shows good correlation between design and measurement validation. In this study, the packaging level reliability test is proceeded to investigate the function degradation after aging process. It is suggested the embedded circuit design margin should include manufacturing tolerance, pattern deform and material property change after aging process.

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Section: Introductionmentioning

confidence: 99%