Integration of amorphous and polycrystalline silicon thin-film transistors through selective crystallization of amorphous silicon

Pangal, K.; Sturm, James C.; Wagner, S.

doi:10.1063/1.124926

Cited by 14 publications

(10 citation statements)

References 11 publications

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“…The simple assumption that the effective channel width, W eff , was equal to the number of NWs multiplied by the average NW diameter (W eff = 50 × 30 nm) yielded a normalized transconductance, M G = G M /W eff , of ~0.56 μS/μm with a normalized on-current, on I = I on /W eff , of ~5.3 μA/μm. These values are comparable to those of polycrystalline Si thin-film transistors (< 1.0 μS/μm) [18].…”

Section: T-tft Based On Sinwssupporting

confidence: 78%

Optical properties of laterally aligned Si nanowires for transparent electronics applications

Lee

et al. 2011

Nano Res.

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We have investigated the optical properties of laterally aligned Si nanowire (SiNW) arrays in order to explore their potential applicability in transparent electronics. The SiNW array exhibited good optical transparency in the visible spectral range with a transmittance of ~90% for a NW density of ~20−25 per 10 μm. In addition, polarization-dependent measurements revealed a variation in transmittance in the range of 80%−95% depending on the angle between the polarization of incident light and the NW axis. Using the SiNWs, we demonstrated that transparent transistors exhibit good optical transparency (greater than 80%) and showed typical p-type SiNW transistor characteristics.

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Section: T-tft Based On Sinwssupporting

confidence: 78%

Optical properties of laterally aligned Si nanowires for transparent electronics applications

Lee

et al. 2011

Nano Res.

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“…Silicon atoms arriving at the roughened surface easily adhere to the surface sites and are immediately trapped by voids and dangling bonds on the SiN x :H surface. It is also expected that the hydrogen plasma pretreatment or higher H 2 /SiH 4 ratio (>90%) will help the film growth with a polycrystalline phase from the early stage of film growth [14,15]. However, on too roughened a surface, there are many adsorption sites, which prevent surface diffusion of adsorbates.…”

Section: Resultsmentioning

confidence: 99%

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

Park

Rhee

2005

Physica Status Solidi (a)

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Microcrystalline silicon (µc-Si : H) films have been deposited onto hydrogenated and amorphous Si-rich silicon nitride and thermal oxide substrates with silane (SiH 4 ) -hydrogen (H 2 ) in remote plasma-enhanced chemical vapor deposition (RPECVD) at 250 °C, and these films have been investigated. It is found that in situ hydrogen plasma pretreatment of the amorphous substrates prior to µc-Si : H deposition is effective in reducing the interfacial amorphous transition region. It is believed that this hydrogen plasma pretreatment gives adsorption and nucleation sites by breaking weak Si -N and Si -Si bonds and also removes native Si -O x and hydrocarbon impurities. In the case of SiN x : H surface, surface roughening from atomic hydrogen etching and surface cleaning effects are greater than those for stable thermal oxide. Surface crystallization at the initial stage of the growth can be obtained on amorphous substrate at low temperature without an a-Si transition layer.

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“…However, conventional furnace crystallization at 600°C takes close to one day. Catalyzed 7 and preanneal nucleation 8,9 approaches can cut this time to ϳ5 h, which still is long when compared to the throughput of one plate per minute desired of the single-substrate cluster tools employed in the manufacture of active-matrix liquid-crystal displays. 1 These results point to the need for isothermal annealing that can be conducted quickly on low-cost substrates.…”

Section: ͓S0003-6951͑99͒03041-7͔mentioning

confidence: 99%

“…Next, a 160-nm-thick precursor film of hydrogenated amorphous silicon (a-Si:H) was deposited at a substrate temperature of 150°C, and then was exposed for 1 h to a hydrogen discharge to induce nucleation. 8,9 These films then were crystallized by furnace annealing at 600°C for 6 h, or 650°C for 1 h, or 700°C for 10 min. The progress and completion of crystallization was monitored by measuring the ultraviolet reflectance at ϭ276 nm, 4,5 with the above times being the minimum required for crystallization of the films as monitored by ultraviolet reflectance.…”

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confidence: 99%

High electron mobility polycrystalline silicon thin-film transistors on steel foil substrates

Pangal

Sturm

et al. 1999

Applied Physics Letters

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Thin-film transistors have been fabricated in polycrystalline silicon films on steel foil. The polycrystalline silicon films were formed by the crystallization of hydrogenated amorphous silicon, which had been deposited on 200-m-thick foils of stainless steel coated with ϳ0.5-m-thick layers of SiO 2 . We employed crystallization temperatures ͑and duration͒ of 600°C ͑6 h͒, 650°C ͑1 h͒, and 700°C ͑10 min͒. Top-gate transistors made from films crystallized at 650°C have an average electron field-effect mobility of 64 cm 2 /V s, with equal values in the linear and saturated regimes. Thus steel substrates permit a substantial reduction in crystallization time over glass substrates, and afford polysilicon with high electron mobility.Considerable effort is expended at present to develop processes for making thin-film transistors ͑TFTs͒ of polycrystalline silicon ͑polysilicon͒ on glass substrates. 1 Owing to their high carrier mobilities compared to those in amorphous silicon, n and p type channel polysilicon TFTs conduct large currents when on, which qualifies them for use in driver circuits. 2 The capability of polysilicon to form n and p channel devices enables complementary metal-oxidesemiconductor ͑CMOS͒ circuits, which are the technology of choice when low power consumption is desired. Polysilicon films for TFTs are made by crystallizing amorphous silicon at elevated temperature. Because the strain points of affordable glass substrates lie just above 600°C, 3 crystallization techniques are restricted to either furnace annealing up to 600°C, 4 or rapid thermal processing by lamp heating, 5 or laser annealing. 6 Furnace annealing is preferred, as it is isothermal and thus produces uniform transport properties over the entire glass plate, which now may be as large as 0.5 m 2 . However, conventional furnace crystallization at 600°C takes close to one day. Catalyzed 7 and preanneal nucleation 8,9 approaches can cut this time to ϳ5 h, which still is long when compared to the throughput of one plate per minute desired of the single-substrate cluster tools employed in the manufacture of active-matrix liquid-crystal displays. 1 These results point to the need for isothermal annealing that can be conducted quickly on low-cost substrates. This can be done with silicon films on substrates of quartz glass, 4 but quartz glass substrates are expensive. Reducing the annealing time was our principal motive for experimenting with steel substrates, which can be heated to well above 600°C. Previous work with steel foil substrate was limited to amorphous silicon TFTs ͑electron mobility ϳ1 cm 2 /V s͒ at temperature р350°C, 10,11 and very recently, to laser crystallized films. 12 In the present study, we found that the crystallization of films of hydrogenated amorphous silicon (a-Si:H) by furnace annealing at temperatures up to 700°C can be conducted in short times, and does produce polysilicon TFTs with high field-effect electron mobility.200-m-thick foils of American Iron and Steel Institute ͑AISI͒ grade 304 stainless steel ͑Fe/Ni/Cr...

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Integration of amorphous and polycrystalline silicon thin-film transistors through selective crystallization of amorphous silicon

Cited by 14 publications

References 11 publications

Optical properties of laterally aligned Si nanowires for transparent electronics applications

Optical properties of laterally aligned Si nanowires for transparent electronics applications

Interfacial modification of amorphous substrates for microcrystalline silicon growth with in situ hydrogen plasma pretreatment

High electron mobility polycrystalline silicon thin-film transistors on steel foil substrates

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