Integration of High‐k Oxide on MoS₂ by Using Ozone Pretreatment for High‐Performance MoS₂ Top‐Gated Transistor with Thickness‐Dependent Carrier Scattering Investigation

Abstract

A top-gated MoS2 transistor with 6 nm thick HfO2 is fabricated using an ozone pretreatment. The influence to the top-gated mobility brought about by the deposition of HfO2 is studied statistically, for the first time. The top-gated mobility is suppressed by the deposition of HfO2 , and multilayered samples are less susceptible than monolayer ones.

Full Energy Spectra of Interface State Densities for n‐ and p‐type MoS2 Field‐Effect Transistors

“…Here, the recent demonstration of a natural thin‐body MoS 2 FET with an effective channel length of ≈ 3.9 nm has facilitated research on 2D layered channels due to overcoming the scaling limit of ≈ 5 nm for Si gate length . Although the dangling‐bond‐free surface of the layered channel is expected to ideally provide an electrically inert interface, there are many reports on the wide range of interface state densities ( D it ) from 10 11 to 10 13 eV −1 cm −2 for high‐ k top‐gate n ‐MoS 2 FET in reality, which must be reduced to improve the device performance. To date, several physical origins for D it have been proposed, which are summarized in Figure a.…”

High Mobility MoS2 Transistor with Low Schottky Barrier Contact by Using Atomic Thick h‐BN as a Tunneling Layer

“…However, the lack of band gap limits its application for logic devices . In recent years, transitional metal dichalcogenides, such as MoS 2, have triggered intensive interests for their unique characteristics such as wide band gap (1.8 eV for monolayer and 1.2 eV for multilayers) and high mobility . In addition, the dangling‐bond‐free surface and the atomic thickness can reduce the short channel effect thus making it a promising candidate for short channel devices .…”

Performance Limits of the Self‐Aligned Nanowire Top‐Gated MoS2 Transistors

“…Among all the devices, transfer curves of the MoS 2 FET with the channel length of 230 nm are focused and measured at 0.01, 0.1, and 1 V, respectively, as depicted in Figure a. Given the shorter channel length than other reports, they display a remarkable switching behavior, such as the low off‐state current (0.3 pA), high on/off current ratio (3 × 10 8 ) and excellent SS (69 mV dec −1 ) at V ds = 1 V . The corresponding output curves are also shown in Figure b with a top‐gate voltage sweeping from −1 to 1.5 V. It is worth noticing that there is an obvious drain current saturation in the output curves.…”

“…Nevertheless, this buffer layer would inevitably reduce the capacitance of the obtained top‐gate dielectrics, along with the introduction of charged impurities contributing to the increased interface trap density ( D it ) and the reduced carrier mobility ( μ ) of the MoS 2 channel. Another technique to attain uniform high‐ k dielectric films is the appropriate surface functionalization by using ozone or oxygen plasma pretreatment, but this pretreatment would as well damage the surface of MoS 2 , deteriorating the performance of fabricated MoS 2 FETs. In any case, even though the short channel effect is another significant issue that limits the device performance of short‐channel MoS 2 FETs, only few work is performed to evaluate these effects .…”