Integration of high voltage devices on thick SOI substrates for automotive applications

Heinle, Ulrich; Olsson, Jörgen

doi:10.1016/s0038-1101(01)00085-5

Cited by 9 publications

(5 citation statements)

References 4 publications

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“…In order to compare the electrical characteristics of our components with earlier results [1], we have fabricated a number of different devices with three different RESURF terminations. The first termination is implemented with a constant doping profile and stretches over 120 µm.…”

Section: Resultsmentioning

confidence: 99%

“…The implantation energy is 50 keV and a boron dose of 2.8·10 12 cm -2 is chosen for the uniform doping profile and the graded doping profile and 2.4·10 12 cm -2 for the second step of the step doping profile. A thin cap oxide is grown at 1000 • C in order to avoid out-diffusion of the boron during the 15 h long RESURF drive-in at 1200 • C. After this step the formation of the slip dislocations can be observed if the trenches are etched at the beginning of the process [1].…”

Section: Process Descriptionmentioning

confidence: 99%

“…The integration of vertical DMOS transistors [1] and bipolar power devices [2] on thick SOI substrates has been demonstrated. In our former process many defects [3] have been created during high temperature steps.…”

Section: Introductionmentioning

confidence: 99%

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Vertical High Voltage Devices on Thick SOI with Back-end Trench Formation

Heinle

Pinardi²,

Olsson³

2002

32nd European Solid-State Device Research Conference

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We present a new process flow for the integration of vertical high voltage devices on thick SOI. The creation of slip dislocations has been avoided by etching and filling the trenches at the end of the process. Thereby are the trenches not exposed to high temperature steps which trigger the creation of these defects. The electrical characteristics of the fabricated devices are not affected by these process modifications. High voltage transistors with breakdown voltages of 480 V have been fabricated with this new process.

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Section: Resultsmentioning

confidence: 99%

Section: Process Descriptionmentioning

confidence: 99%

See 1 more Smart Citation

Vertical High Voltage Devices on Thick SOI with Back-end Trench Formation

Heinle

Pinardi²,

Olsson³

2002

32nd European Solid-State Device Research Conference

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show abstract

“…Furthermore, since the high-voltage drain side is at the surface, a lateral high-voltage design is also needed. This vertical SOI technology has been used to realize both high-voltage (500 V) DMOS transistors on 50 µm SOI-layer 7 and 600 V bipolar devices with a 60 µm layer thickness 8 . Figure 4 shows the example of the 500 V vertical DMOS transistor with simulation results of the electrical potential distribution within the device.…”

Section: Vertical High-voltage Soi Process: An Academic Research Projectmentioning

confidence: 99%

“…For vertical high-voltage SOI devices, as described in section 2.1, additional effects have to be considered. Figure 10a shows the top-view of a multi-fingered DMOS transistor with several mm effective gate width 7 . The gates are in a dense square mesh pattern in order to increase the on-state current density.…”

Section: Soi-device Layout Considerationsmentioning

confidence: 99%