2013 IEEE International Electron Devices Meeting 2013
DOI: 10.1109/iedm.2013.6724557
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Integration of III-V nanowires on Si: From high-performance vertical FET to steep-slope switch

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Cited by 30 publications
(22 citation statements)
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“…To break this limit, different types of devices have been proposed based on various mechanisms. Tunnel FETs (TFET) based on band-toband tunneling demonstrate SS below 30 mV/dec [1]. Nevertheless, the sensitivity of SS to gate voltage leads to a worse average SS over the entire subthreshold region [1][2][3].…”
Section: Introductionmentioning
confidence: 99%
See 1 more Smart Citation
“…To break this limit, different types of devices have been proposed based on various mechanisms. Tunnel FETs (TFET) based on band-toband tunneling demonstrate SS below 30 mV/dec [1]. Nevertheless, the sensitivity of SS to gate voltage leads to a worse average SS over the entire subthreshold region [1][2][3].…”
Section: Introductionmentioning
confidence: 99%
“…Tunnel FETs (TFET) based on band-toband tunneling demonstrate SS below 30 mV/dec [1]. Nevertheless, the sensitivity of SS to gate voltage leads to a worse average SS over the entire subthreshold region [1][2][3]. Impact-ionization MOS (IMOS) achieves sub-5 mV/dec SS based on avalanche breakdown [4], though requiring high V DS and suffering from reliability issues.…”
Section: Introductionmentioning
confidence: 99%
“…As illustrated in Fig. 12, the equivalent total transistor capacitance forms as an ac voltage divider in series with the input coupling capacitance , and affects in the ways of (12) where (13) As a result, a large results in excessive , which can lower the of the rectifier. Fig.…”
Section: A Transistor Sizing and Coupling Capacitance Optimizationsmentioning
confidence: 99%
“…By taking advantages of the band-to-band tunneling induced carrier injection mechanism, TFETs, in principle, are able to achieve a sub-thermal energy switching (sub-60 mV/decade) with a high on-off current ratio at reduced supply voltages. The advancement in the TFET on-current improvement with improved gate-electrostatic control, low-bandgap material and tunneling junction engineering [9]- [12], as well as the process development of the heterogeneous integrations [13] has shown its prominent potential to extend the technology roadmap with optimal energy efficiency beyond the CMOS limit. Lots of efforts have also been made on TFET-based circuit and architecture designs, compact model development, reliability evaluation, and variation analysis [14]- [18] to bridge the device innovations with the practical circuit and system design requirements.…”
Section: Introductionmentioning
confidence: 99%
“…Later on, a further improvement of oncurrent of 180 µA/µm has been achieved by Zhou et al [8] in a GaSb-InAs TFET. Recent advancement in complementary TFET process [9,10] has further highlighted both the performance improvement and process compatibility for TFET technology.…”
Section: A Tunnel Fet Device Designmentioning
confidence: 99%