Interconnect strategies for deep submicron CMOS manufacture

Improved a priori interconnect predictions and technology extrapolation in the GTX system

“…More recent second-generation systems include GENESYS [13], RIPE [14,15,16], and BACPAC [17], along with Roadmap-related efforts [18,19]. Typically, each system provides a plausible performance prediction model and estimates of die size and power dissipation, based on a small set of descriptors spanning device/interconnect technology through system architecture.…”