Interleaved DC–DC zero-voltage switching converter with series-connected in the primary side and parallel-connected in the secondary side

A novel high step-up DC-DC converter with coupled inductors has been proposed. The proposed topology includes two coupled inductors, four capacitors, four diodes, and two metal-oxide-semiconductor field-effect transistors. Two coupled inductors charge in parallel when the switches are on and discharge in series when switches are off. Additionally, for absorbing the energy of stray inductance, a regenerative snubber is used. In this way, the duty cycle of the power switches can vary in a wider range and the voltage gain is higher in comparison to most of the other coupled-inductor-based converters. The effectiveness of the proposed converter has been verified by various simulation and experimental results.

Section: Introductionmentioning

confidence: 99%

Coupled‐inductor‐based high step‐up DC–DC converter

Ebrahimi

Kojabadi

Chang

et al. 2019

“…In high power applications, interleaving for paralleling of power converter was done to distribute transformer magnetics. Thus, the high input voltage stress to switches is reduced [20][21][22][23][24][25][26][27]. The current double rectifier (CDR) at the secondary side distributes filter inductor magnetics.…”

Section: Introductionmentioning

confidence: 99%

Interleaved centre clamped forward converter (ICCFC) for wide input voltage range applications

Veeraraghavalu¹,

Dheeraj²

2019

A new interleaved centre clamped forward converter for high current applications is proposed. It is a series input and series output structure with common active clamp reset branch. In the proposed converter, both the high input voltage stress and output current stress are reduced. The converter comprises of two active clamp forward converters with one common centre clamp reset circuit and the series output comprises of a current double rectifier (CDR) with self-driven synchronous rectifier (SDSR). The capacitor divider at the input reduces the switching stress due to input voltage. The common centre clamp circuit enables the transformer core reset without any additional circuit and enables zero volt switching. The SDSR-based CDR reduces burden on the secondary side of the transformer by an additional current sharing. Extended duty cycle beyond 50% is achieved. Overall reduction in the size of magnetic components with reduced part count and high-power density is attained. Prototype for 50 W with input voltage in the range of 50-200 V, 5 V/10 A output at 100 kHz was developed. The experimental results match the theoretical investigations.

“…Thus, the total output ripple current can be reduced and the size of inductors can be also reduced. Interleaved PWM techniques [14] are the other approaches to increase the total output power, lessen the current rating of power devices, and also reduce the input and output ripple currents. The ripple frequency is two times of switching frequency which can minimise the weight and size of the output filter.…”

Section: Introductionmentioning

confidence: 99%

Interleaved zero‐voltage switching three‐level converter with less output inductor counts

Lin

2017

An interleaved three-level converter with the new current doubler rectifier is proposed. The main advantages of the proposed converter are zero-voltage switching (ZVS) turn-on for all switches, low output ripple current and less voltage stress of the output diodes. Two three-level converters connected in parallel are used to decrease the input current ripple, as well as to reduce the current rating of power switches. At the secondary side, two current doubler rectifiers sharing the same output filter inductors to reduce the output current ripple. Compared with the conventional centre-tapped rectifier and current doubler rectifier, the adopted current doubler rectifier has less output current ripple. The output capacitance of the power switch and the leakage inductance (or external inductance) are resonant at the transition interval so that the power switches can be turned on under ZVS. The adopted converter can be employed in high voltage input and high current output applications. Experiments with a prototype with 750-800 V input and 48 V/30 A output are provided to verify the theory analysis.