Introducing Control Flow into Vectorized Code

Abstract

Single instruction multiple data (SIMD) functional units are ubiquitous in modern microprocessors. Effective use of these SIMD functional units is essential in achieving the highest possible performance. Automatic generation of SIMD instructions in the presence of control flow is challenging, however, not only because SIMD code is hard to generate in the presence of arbitrarily complex control flow, but also because the SIMD code executing the instructions in all control paths may slow compared to the scalar original, which may bypass a large portion of the code. One promising technique introduced recently involves inserting branches-on-superword-condition-codes (BOSCCs) to bypass vector instructions. In this paper, we describe two techniques that improve on the previous approach. First, BOSCCs are generated in a nested fashion so that even BOSCCs themselves can be bypassed by other BOSCCs. Second, we generate all vec any * instructions to bypass even some predicate-defining instructions. We implemented these techniques in a vectorizing compiler. On 14 kernels, the compiler achieves distinct speedups, including 1.99X over the previous technique that generates singlelevel BOSCCs and vec any ne only.

Exploring the Design Space of SPMD Divergence Management on Data-Parallel Architectures

“…Shin [32] describes a similar dynamic branch-uniformity optimization called BOSCC (branches-on-superwordcondition-codes), but relies on predicate hierarchy graphs to nest regions that are covered by BOSCC to reduce runtime overhead of checking the uniformity of branch conditions. In contrast, we utilize the structural analysis to pick candidate SESE regions for runtime checks.…”

“…Vector-style architectures with a scalar+vector ISA employ a compiler-driven approach to divergence management [1,12,13,27,32,33]. In this model, the vector unit cannot execute branch instructions.…”

Extending a C-like language for portable SIMD programming

“…polyhedral techniques [5]) are applied. Other approaches exploit ILP in code that can contain control structures (like conditionals and loops) [18,19,32] for vectorization or vectorize a whole function [16]. Often, those approaches rely on preceding transformations that create this ILP.…”

Whole-function vectorization

“…Reintroducing Branches for Homogeneous Masks: For linearized regions, an optimization similar to branch-onsuperword-condition-codes (BOSCC) [6] can be applied. Such a technique reintroduces branches after linearization to skip blocks of instructions if a mask is true or false for all instances.…”