Inverse Design of FinFET SRAM Cells

Zhang, Rui; Liu, Zhaocheng; Yang, Kexin; Liu, Taizhi; Cai, Wenshan; Milor, Linda

doi:10.1109/irps45951.2020.9129530

Cited by 3 publications

(3 citation statements)

References 18 publications

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“…Chen et al (2020) propose a human approach using hill climbing and support vector regression for optimizing silicon on insulator (SOI) lateral power devices (1) . Zhang et al (2020) tackle the issue of wear and tear effects and process variations in FinFET SRAM cells by integrating deep neural networks (DNNs) and evolutionary algorithms (EAs) (2) . Ashai et al (2023) tackle the challenge of extracting parameters for the BSIMCMG semiconductor device model using a deep learning architecture that combines a convolutional neural network (CNN) and GPT-3.5 (3) .…”

Section: Fig 1 Workflow Of the Projectmentioning

confidence: 99%

“…Our pursuit of advancing transistor design is substantiated through a scrupulous comparative investigation, intricately connecting our research findings with crucial literature in design optimization. By drawing insights from the works of Chen et al (2020) and Zhang et al (2020), who deeply explored silicon on insulator (SOI) lateral power devices and FinFET SRAM cells, respectively, our inverse design model for transistors surpasses traditional limitations. Through the comparison of our results, we not only affirm the effectiveness of our approach but also underline the evolutionary shift towards more efficient and automated processes in transistor design.…”

Section: Comparative Studymentioning

confidence: 99%

“…Figure 10 shows the model result when the desired gain and bandwidth are entered. 2020), who explored silicon on insulator (SOI) lateral power devices and FinFET SRAM cells, respectively (1) (2) . By leveraging machine learning techniques, our inverse design model for transistors seeks to surpass the limitations posed by traditional methodologies.…”

Section: Fine-tuningmentioning

confidence: 99%

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Machine Learning-based Inverse Design Model of a Transistor

Sahoo,

Patel

2024

IJST

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Objectives: To develop an inverse design model for transistors, utilizing machine learning algorithms to predict key design parameters specifically, the length and width based on specified gain and bandwidth requirements. And to conduct a comprehensive comparative analysis with existing literature, evaluating the efficacy and novelty of the proposed model in the context of semiconductor engineering challenges and methodologies. Methods: The comprehensive dataset, comprising 30,000 values generated through LTspice simulations, forms the basis for training the machine learning model. Utilizing a Random Forest regressor as the base model and a multi-output regressor as the main model, the project involves extensive data analysis, model development, and iterative fine-tuning. Findings: The outcomes demonstrate the efficacy of the developed model in accurately predicting transistor dimensions. Performance metrics, including Mean Absolute Error (MAE), Mean Squared Error (MSE), and R-squared, highlight the precision of the model in fulfilling the specified objectives. Novelty: This study introduces a novel approach to semiconductor device design optimization, showcasing the potential of machine learning to streamline the inverse design process. The use of a multi-output regressor, feature engineering, and fine-tuning through log transformation contribute to the innovative nature of the developed model. Keywords: Machine Learning (ML) model, Random Forest regressor, multioutput regressor, Feature engineering, Finetuning

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Section: Fig 1 Workflow Of the Projectmentioning

confidence: 99%

Section: Comparative Studymentioning

confidence: 99%

Section: Fine-tuningmentioning

confidence: 99%

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Machine Learning-based Inverse Design Model of a Transistor

Sahoo,

Patel

2024

IJST

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V-Ramp V_BD Prediction Method Using OCD-Spectrum and Deep-Learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk

Rhee,

Park,

Park

et al. 2024

2024 IEEE International Reliability Physics Symposium (IRPS)

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HPM: High-Precision Modeling of a Low-Power Inverter-Based Memristive Neural Network

Mohajeri

Ebrahimi

Dousti

2021

J CIRCUIT SYST COMP

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In this paper, we propose a high-precision memristive neural network with neurons implemented by complementary metal oxide semiconductor (CMOS) inverters. Regarding the process variations in the memristors and the sensitivity of the memristive crossbar structure to these fluctuations, the read operation with repetitive pulses and feedback-based write in the memristors are used to implement the neural networks trained by the ex-situ method. Moreover, accurate modeling of the neuron circuit (CMOS inverter) and decreasing the mismatch between trained weights and the limited memristances fill the gap between simulation and implementation. To employ physical constraints based on the memristor framework during the training phase, a linear function is utilized to map the trained weights to the acceptable range of memristances after the training phase. To solve the vanishing gradient problem due to the use of the tanh function as an activation function and for better learning of the network, some measures are taken. Moreover, fin field-effect transistor (FinFET) technology is used to prevent the reduction of the accuracy of the inverter-based memristive neural networks due to the process variations. Overall, our implementation improves the speed, area, power-delay product (PDP), and mean square error (MSE) of the training stage by 91.43%, 95.06%, 48.29% and 81.64%, respectively.

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Inverse Design of FinFET SRAM Cells

Cited by 3 publications

References 18 publications

Machine Learning-based Inverse Design Model of a Transistor

Machine Learning-based Inverse Design Model of a Transistor

V-Ramp V_BD Prediction Method Using OCD-Spectrum and Deep-Learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk

HPM: High-Precision Modeling of a Low-Power Inverter-Based Memristive Neural Network

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Inverse Design of FinFET SRAM Cells

Cited by 3 publications

References 18 publications

Machine Learning-based Inverse Design Model of a Transistor

Machine Learning-based Inverse Design Model of a Transistor

V-Ramp VBD Prediction Method Using OCD-Spectrum and Deep-Learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk

HPM: High-Precision Modeling of a Low-Power Inverter-Based Memristive Neural Network

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Product

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V-Ramp V_BD Prediction Method Using OCD-Spectrum and Deep-Learning, and Application to Early Detection of V-NAND Low Metal Reliability Risk