Investigation of model-based physical design restrictions (Invited Paper)

Abstract

As lithography and other patterning processes become more complex and more non-linear with each generation, the task of physical design rules necessarily increases in complexity also. The goal of the physical design rules is to define the boundary between the physical layout structures which will yield well from those which will not. This is essentially a rule-based pre-silicon guarantee of layout correctness. However the rapid increase in design rule requirement complexity has created logistical problems for both the design and process functions [1]. Therefore, similar to the semiconductor industry's transition from rule-based to model-based optical proximity correction (OPC) due to increased patterning complexity, opportunities for improving physical design restrictions by implementing model-based physical design methods are evident. In this paper we analyze the possible need and applications for model-based physical design restrictions (MBPDR). We first analyze the traditional design rule evolution, development and usage methodologies for semiconductor manufacturers. Next we discuss examples of specific design rule challenges requiring new solution methods in the patterning regime of low K1 lithography and highly complex RET. We then evaluate possible working strategies for MBPDR in the process development and product design flows, including examples of recent model-based pre-silicon verification techniques [2]. Finally we summarize with a proposed flow and key considerations for MBPDR implementation.

Toward DFM: process worthy design and OPC through verification method using MEEF, TF-MEEF, and MTT

“…Lithographer's understanding of DFM can be interpreted as 'a process worthy design' and the requirements derived from this understanding needs to be well defined and delivered to the designer as a necessary condition for the final yield promising design. There are two approaches in manipulating the designer's layout: one is a feed-forward method to restrict design space based on lithography rules [1,2,3] and the other is a feed-back method which is using a robust metric devised by the lithographer to alarm the designer during the routing [4].…”

Layout verification and optimization based on flexible design rules

“…1 While RET allow for a reduction in the printable Critical Dimension (CD) an inevitable side effect is associated with the gain in resolution, strongly dependent on the type of RET and lithographic process conditions. This phenomenon, generically termed Optical Proximity Effect, consists of a series of pattern dependent distortions localized within a layout region whose range is a function of the optical wavelength, the Numerical Aperture of the optical system and the k1 process factor.…”

“…It is well known in semiconductor technology development practices that an analogous of Moore's Law applies inversely to the size of DRM and that from less than 50 pages of rules at the 250 nm node, to the average 260 pages GDR at 65 nm in 2005, finally more than 2000 pages of rules are predicted for the 22 nm node. 1 While drastic Restricted Design Rules (RDR) schemes have been proposed, in order to limit the number of GDR practically usable in the creation of competitive physical layouts, the overall trade-off between layout integration and manufacturability has not been fully characterized, with growing concerns from the design community that an over-constrained set of RDR might altogether prevent the creation of any layout. Furthermore RDR cannot, due to RET intrinsic non-linearity in the sub-wavelength domain, guarantee manufacturability for all possible layout shapes (especially in 2D configurations as it will be illustrated in the following discussion).…”

Lithography friendly routing: From construct-by-correction to correct-by-construction

“…Significant efforts for hotspot detection have been reported. In the rule-based approaches, a set of rules made from fab data are applied to layout [25], [28] in the form of 1D geometric measurements such as minimum line width, minimum space, forbidden pitches, and so on. However, while aggressive RET and OPC models are well defined for simple 1D geometry rules, complex interactions of 2D geometries are difficult to capture and analyze [29].…”