Investigation on effectiveness of series gate resistor in CDM ESD protection designs

Abstract

The impact of gate series resistor on CDM protection effectiveness is systematically evaluated using SPICE simulation and verified with a modified VF-TLP test method. It is shown that the effectiveness of the resistor to a MOS input device is highly dependent on the size of the protected MOS device as well as on the types of ESD protection circuits. Larger MOS devices require smaller resistance values than smaller devices.