Investigations of defect evolution and basal plane dislocation elimination in CVD epitaxial growth of silicon carbide on eutectic etched epilayers

ECS J. Solid State Sci. Technol.

2014

Self Cite

The growth of 4 • off-axis 4H-SiC epilayers by chemical vapor deposition is studied using dichlorosilane as the Si precursor in a chimney reactor. The unintentional and intentional nitrogen doping at various C/Si ratios and N 2 flow rates are investigated. The C/Si ratio has a significant influence on the growth rate, surface morphology, conversion of basal plane dislocations (BPDs), and generation of other defects (e.g., in-growth stacking faults and morphological defects). Addition of N 2 has no obvious influence on growth rate and BPD conversion. It is preferable to grow high quality n + epilayers at a C/Si ratio in the range of 1.3-1.8 along with the addition of a suitable amount of N 2 in consideration of high growth rate, good surface morphology, and low defect density. In this case, the conversion ratio of BPDs to threading edge dislocations is greater than 99.8% regardless of N 2 addition. Therefore >99.8% substrate BPDs can be buried in an n + buffer layer, which is beneficial to SiC bipolar power devices. No special treatment prior to, during or after the epigrowth is necessary. The epilayers with doping concentration all the way from p − (∼1e15 cm −3 ) to semi-insulating, then to n + (∼1e18 cm −3 ), can be achieved, giving a great range of flexibility in growth using dichlorosilane precursor. Further optimization of in-situ etching and growth conditions to eliminate step bunching has also been suggested. 4H-silicon carbide (4H-SiC) is a promising wide bandgap material for high power electronic devices, owing to its unique thermal and electrical properties such as high breakdown field, high thermal conductivity, and high electron saturation velocity.1,2 Chemical vapor deposition (CVD) is a well-developed technique adopted in semiconductor industry to produce high purity and high quality thin films.3 Homoepitaxial growth of SiC via the CVD technique is one of the key steps in the fabrication of high performance SiC devices. Currently, chloride-based CVD has attracted much interest to potentially replace the traditional silane based CVD for SiC epitaxial growth to reduce the Si droplet formation at high growth rates, because of the higher bonding energy of Si-Cl (400 kJ/mol) than SiSi (226 kJ/mol).4 Dichlorosilane (SiH 2 Cl 2 , DCS) is a gas (boiling point: 8.2• C) at room temperature. It has been demonstrated that using DCS and propane (C 3 H 8 ) as the precursors, high crystalline quality 8• off-axis SiC epilayers were achieved at a high growth rate (up to 100 μm/h). 5,6 At present, the standard off-axis angle of commercially available SiC substrates is lowered to 4• to reduce the material loss during substrate preparation from the crystal boules.Step-bunching is a typical surface feature of the epilayers grown on 4• off-axis substrates, resulting in increase in surface roughness. 7Morphological defects, specifically the triangular defects and inverted pyramids, are prone to be generated in epigrowth on low off-axis angle substrates. 8 Hence, determination of optimized growth conditions to produce SiC ...

mentioning

confidence: 99%

Study of Surface Morphology, Impurity Incorporation and Defect Generation during Homoepitaxial Growth of 4H-SiC Using Dichlorosilane

Song

Chandrashekhar

ECS J. Solid State Sci. Technol.

2014

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“…In general, at the optimal growth conditions, substrate TSDs all propagate into the epilayer; and the growth process will not generate new TSDs. 56 The TEDs in the epilayer mainly originate from the substrate TEDs and BPD conversions. 51,56 The results in Table III indicate that regardless of the Si-precursor used, the generation of new TSDs and TEDs in epitaxial growth can be suppressed by optimizing the growth conditions.…”

Section: Simentioning

confidence: 99%

Trade-Off between Parasitic Deposition and SiC Homoepitaxial Growth Rate Using Halogenated Si-Precursors

ECS J. Solid State Sci. Technol.

Rana

Song

et al. 2013

Self Cite

We discuss the use of halogenated Si-X precursors, compared to the traditional silane precursor, to increase the growth rate of thick, high quality SiC homoepitaxial layers by chemical vapor deposition for power electronics applications. These precursors reduce gas phase nucleation and parasitic deposition to increase the availability of reactive Si-species at the SiC growth front due to their less reactive nature compared to silane. While less reactive Si-X species are expected to provide lower activity of Si-species at the growth front, the reduced parasitic deposition and precursor depletion from the gas delivery system leads to an effective increase in overall growth rate. This trade-off is explored in the context of parasitic deposition-induced particulate formation that degrades SiC epilayer morphology, while introducing structural defects. It is difficult to effectively compare different precursors used by various researchers, as there is no standard set of reported epilayer crystal quality parameters that takes into account various precursor/epilayer related benefits/tradeoffs. We propose a set of reactor-independent metrics that may enable realistic comparison across the various Si-X precursor chemistries. Results at the authors' laboratory indicate that tetrafluorosilane precursor shows great promise in breaking the growth-rate/parasitic deposition trade-offs inherent in SiC growth, critical for widespread commercial adoption of SiC technology.

“…BPD conversion at the substrate/epilayer interface is very important for high reliability of SiC power devices as the BPDs buried in the epilayer can still be converted to SFs under current stress and these SFs will extend to the device active layer and degrade the device performance . Approximately 500 BPDs/cm 2 are on the substrate surface and 99% of them are converted in to TEDs − producing ∼5 BPDs/cm 2 on the epilayer surface, which is still a significant value adversely affecting the epitaxial wafer yield for device fabrication. Thus, 100% conversion at the substrate/epilayer interface for 4° off-oriented substrates is essential to achieve high yield and performance characteristics of SiC devices at the commercial level.…”

Section: Introductionmentioning

confidence: 99%

“…Earlier studies conducted by Wheeler et al have shown that BPD conversion on the epilayer shows an abrupt increase on low-doped nitrogen films (<10 16 cm –3 ), while high-doped films show minimal BPD conversion. Recently, Song and Sudarshan developed a “growth–etch–regrowth” technique which employs a well-controlled eutectic etching method to achieve a BPD-free epilayer with almost no surface degradation for 8° SiC epilayers. The etch pits are created when the eutectic chemical etchants (KOH-NaOH-MgO salt mixture) react with the SiC epilayer and selectively (anisotropically) etch the areas where the crystal defects are present .…”

Section: Introductionmentioning

confidence: 99%

Basal Plane Dislocation Free Recombination Layers on Low-Doped Buffer Layer for Power Devices

Balachandran

Crystal Growth & Design

Chandrashekhar

2017

We report a novel approach to grow BPD-free 4H-SiC device-ready epilayers, where we start by growing a thin low-doped buffer layer (5 × 1015 to 1 × 1016 cm–3, N-type) to achieve 100% BPD conversion, followed by a moderately thick (∼10 μm) higher-doped recombination layer (5 × 1016 to 1.6 × 1017 cm–3, N-type) to ensure that all recombination occurs within a BPD-free region. High doping of the BPD-free recombination layer ensures fast carrier recombination under forward bias, preventing any stacking fault nucleation in the active layer during bipolar device operation. All the individual BPDs in the buffer epilayer are converted to benign threading edge dislocations (TEDs) over a wide range of C/Si ratios (1 to 1.8), introducing a minimal on-resistance of <0.5 mΩ-cm2. 100% BPD conversion occurs due to the controlled and highly anisotropic eutectic etching of the buffer layer which produces narrow sector angle (5°) for the BPD etch pits to enable conversion of the BPDs within ∼1.5 μm of epilayer growth into TEDs, by promoting lateral growth at the narrow sector of BPD etch pits. This technique enables the translation of BPD conversion technology to real high-power bipolar device architectures in applications such as electric vehicles and solar power grid compatibility circuitry.