Ion implantation in III–V compounds

Eisen, F. H.

doi:10.1080/00337578008209195

Cited by 51 publications

(5 citation statements)

References 55 publications

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“…The point is that if there is little or nothing to be gained electrically by increasing doses above 5-10 • 10 '3 cm -'2, then doses should be limited to these values. Elevated temperature implantation of heavy species like Se or Te prevents amorphization and leads to higher electrical activities than room temperature implants (13), but for device production it is simpler to use a lighter ion (Si) and room temperature implantation.…”

Section: Activation Of N-type Dopants--the Two Most Suitablementioning

confidence: 99%

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Rapid Thermal Annealing in GaAs IC Processing

Pearton

Cummings

Vella−Coleiro

1985

J. Electrochem. Soc.

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A variety of annealing steps in GaAs IC processing presently performed in conventional furnaces may be readily transferred to more convenient rapid annealing furnaces. A comparison of the activation characteristics achieved for common implanted species (Si, Se, Be, Mg, and Zn) into semi-insulating GaAs by both annealing regimes is given. The limitations and advantages of the two methods with respect to encapsulation requirements, throughput, and handling are discussed.

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Section: Activation Of N-type Dopants--the Two Most Suitablementioning

confidence: 99%

“…This is a clear example of a situation where rapid annealing is superior to furnace annealing. Activation of p-type implants.--It is widely recognized that p-type implanted regions are activated at lower annealing temperatures than n-type implants (1,13). In Fig.…”

Section: Activation Of N-type Dopants--the Two Most Suitablementioning

confidence: 99%

Rapid Thermal Annealing in GaAs IC Processing

Pearton

Cummings

Vella−Coleiro

1985

J. Electrochem. Soc.

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“…SIMS measurements in GaAs.--In recent years increased attention has been focused on ion implantation in III-V compounds (439) and specifically in GaAs (440). This is reflected by the large number of SIMS depth profiling measurements performed in this semiconductor.…”

Section: Dopant and Impurity Distributions In Semiconductorsmentioning

confidence: 99%

Sputter Depth Profiling of Microelectronic Structures

Zinner

1983

J. Electrochem. Soc.

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Reviewed are the principles and applications of sputter depth profiling for the analysis of semiconductor and microelectronic materials. Various techniques are based on sputter removal whereby either the sputtered species (in SIMS, SCANIIR) or the remaining surface (AES, XPS, ISS) are investigated. In spite of its increasing importance, there are many problems associated with sputter etching. After a general survey of the principles, a detailed discussion is devoted to the many effects which can distort sputter depth profiles and limit depth resolution. These effects can be caused by instrumental factors (nonuniformity of erosion, beam impurities, vacuum contaminants) and the sample composition or can be due to the analysis method used (information depth, matrix effects, detection limit, sample consumption). Most important are the effects caused by the sputtering ion beam itself. Among these are notably preferential sputtering, atomic mixing, surface roughness as a result of the sputter process, sample charging, surface transport, and chemical reduction. The review of applications concentrates on the measurement of the distribution of dopants and impurities in semiconductors, on the study of insulating films (in particular the Si/SiO~ interface and the oxidation of GaAs), and on the metallization problem in Si and GaAs technology.The ever-increasing miniaturization of electronic devices in VLSIC technology (1) places new demands on analytical techniques for their characterization (2, 3). Of special interest is the measurement of elemental distributions, in particular the measurement of dopant distributions in the semiconductor substrate (4, 5) and the analysis of diffusive and reactive processes between metal, semiconductor, and dielectric films (6, 7) which are the basic elements of microelectronic structures. The analytical requirements for measurement techniques include good spatial resolution as well as elemental sensitivity and specificity. Although there are interesting questions to be asked with respect to lateral dimensions, because of the planar structure of most microelectronic devices, methods for the measurement of elemental concentrations as a function of depth are of special importance. An example for the requirements for the depth resolution of such methods is given in Fig. 1 which shows calculated depth distributions of dopants in base and camel collector of a monolithic hot electron transistor (MHET) with an extremely shallow barrier raising implant.An overview of methods for the measurement of depth profiles is given in Table I. The so-called nondestructive techniques are so named n~t because they necessarily leave the sample undamaged, but because the sample surface does not have to be removed in order to obtain information about the inside. The sample interior is rather probed with penetrating ion or electron beams whereby the depth information is obtained via the energy loss experienced by the particles while traversing the sample. Rutherford backscattering spectroscopy (RBS) is based on the ...

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“…In order to overcome these problematic consequences, we suggest not using ion implantation to dope the material, but rather using ion-implantation to selectively generate high-resistivity isolation regions in a semiconductor wafer on the doped layers areas which has been epitaxially-grown [26][27][28]. The goal for this approach is to generate an effect comparable to mesa-isolation fabrication step, to do that the junction(s) are grown conventionally, selectively masked, and then ion-implantation is used to isolate the detectors [29].…”

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confidence: 99%

“…This corresponds to ions affecting the entire top p-contact, barrier, and reaching 150 nm into the n-type MWIR absorption region. Increasing the implantation dose and energy further may yield a further reduction of the dark current however, the energy/dose of bombardment ions cannot be very low or isolation will not be attained, nor can they be unlimitedly high, or damage-related conduction effects or hopping conduction effects could increase the dark current [26,27]. This risk is borne out by the comparatively larger dark current at a high temperature, which may be related to the nature of the defects created by the ion-implantation process [26], which must be addressed via further optimization.…”

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confidence: 99%

Demonstration of Planar Type-II Superlattice-Based Photodetectors Using Silicon Ion-Implantation

Dehzangi

McClintock

et al. 2020

Photonics

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In this letter, we report the demonstration of a pBn planar mid-wavelength infrared photodetectors based on type-II InAs/InAs1−xSbx superlattices, using silicon ion-implantation to isolate the devices. At 77 K the photodetectors exhibited peak responsivity of 0.76 A/W at 3.8 µm, corresponding to a quantum efficiency, without anti-reflection coating, of 21.5% under an applied bias of +40 mV with a 100% cut-off wavelength of 4.6 µm. With a dark current density of 5.21 × 10−6 A/cm2, under +40 mV applied bias and at 77 K, the photodetector exhibited a specific detectivity of 4.95 × 1011 cm·Hz1/2/W.

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Ion implantation in III–V compounds

Cited by 51 publications

References 55 publications

Rapid Thermal Annealing in GaAs IC Processing

Rapid Thermal Annealing in GaAs IC Processing

Sputter Depth Profiling of Microelectronic Structures

Demonstration of Planar Type-II Superlattice-Based Photodetectors Using Silicon Ion-Implantation

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