Is 25 Gb/s On-Board Signaling Viable?

Kam, Dong Gun; Ritter, Mark B.; Beukema, T.; Bulzacchelli, John F.; Pepeljugoski, P.; Kwark, Young; Shan, Lei; Gu, Xiaoxiong; Baks, Christian; John, R.; Hougham, Gareth; Schuster, Christian; Rimolo-Donadío, Renato; Wu, Bian

doi:10.1109/tadvp.2008.2011138

Cited by 74 publications

(21 citation statements)

References 24 publications

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“…Using Tomlinson-Harashima precoding (THP) or decision feedback equalization (DFE), data rates near 10 Gbps per lane are currently being achieved with a power consumption of about 1 mW/Gbps [1]- [5]. Recent research (e.g., [6]- [8]) deals with increasing this speed up to 25 Gbps per lane, whereas in the (near) future speeds up to 100 Gbps per lane are targeted [9].…”

Section: Introductionmentioning

confidence: 99%

Linear MIMO equalization for high-speed chip-to-chip communication

Jacobs

Guenach²,

Moeneclaey

2015

2015 IEEE International Conference on Communications (ICC)

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Abstract-In this contribution, we present a linear multiple-input multiple-output (MIMO) equalization scheme at the receiver side for high-speed electrical chip-tochip communication. As opposed to traditional single-input single-output (SISO) equalization per lane, this MIMO approach enables cooperating receivers to treat crosstalk (XT) between neighboring channels as an informationbearing signal instead of a disturbing signal, allowing to mitigate both inter symbol interference and XT. Given a simulated 4 × 4 MIMO electrical chip-to-chip interconnect channel, we point out that, for a given total number of equalizer taps, MIMO equalization can outperform SISO equalization. Moreover, by further increasing the total number of equalizer taps, MIMO equalization allows to obtain performance gains that are substantially larger than for SISO equalization.

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Section: Introductionmentioning

confidence: 99%

Linear MIMO equalization for high-speed chip-to-chip communication

Jacobs

Guenach²,

Moeneclaey

2015

2015 IEEE International Conference on Communications (ICC)

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“…If cheap optical interconnects should be used in such kinds of applications, all components should be able to operate at elevate temperatures of 85°C and higher, including the main light source -the semiconductor laser. Since VCSELs have very large potential to serve as a light source for board-to-board, module-to-module, chip-to-chip and on-chip optical interconnects [8], [125], [126], demand on high speed high temperature stable VCSELs capable for cheap mass production is rapidly growing.…”

Section: High Temperature Stable 980 Nm Vcsel Resultsmentioning

confidence: 99%

High Speed VCSELs for Optical Interconnects

Mutig

2011

Springer Theses

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The forecast for the serial transmission speeds used for data communication s ystems is a continued exponential increase with time, directly in concert with silicon integrated circuit scaling and in response to human society's perpetual hunger for massive increases in bandwidth. Electrical interfaces for single channel bit rates beyond 10 Gbit/s are being standardized for a variety of applications, including for example (with an expected data -rate): Fibre Channel FC32G (34 Gbit/s), InfiniBand (20 Gbit/s), common electrical interface CEI (25-28 Gbit/s), and universal serial bus protocols USB 3.0 (up to 25 Gbit/s). As a result, the fundamental electro-magnetic limitations of copper wire-based links at bit rates >10 Gbit/s make fiber based optics for data communication indispensable at distances >1 m. At shorter distances, problems associated with electrical transmission lines at such high frequencies, e. g. high power consumption, strong signal attenuation, signal distortion and electromagnetic interference, lead to unstoppable and progressive penetration of optical communication links into traditional copper interconnect markets. These trends greatly expand the applications of vertical cavity surface emitting lasers (VCSELs) and VCSEL arrays as very inexpensive, efficient, reliable, readily manufacturable and compact laser light sources for next-generations of fiber-optic, free-space, board-to-board, module-to-module, chip-to-chip and on-chip interconnects and related information systems and networks.Already today oxide-confined GaAs-based VCSELs emitting at 850 nm are the key components for low cost high speed local and storage area network (LAN/SAN) data communication systems. Furthermore, active optical cable links for short-reach computer and consumer applications, for example USB, DisplayPort, and HDMI standards, are increasingly based on VCSELs operating in the near-infrared spectral range. Immense research and development effort all around the world resulted in the great progress in the area of highspeed GaAs-based VCSELs in the last few years. At the standard wavelength of 850 nm room temperature error free data transmission at the bit rate of 32 Gbit/s has been demonstrated in 2009. Also at longer wavelengths bit rates of 35 Gbit/s (980 nm) and 40 Gbit/s (1100 nm) have been achieved at room temperature using GaAs-based VCSELs, while the latter device was based on the buried tunnel junction, requiring additional epitaxial growth step and making the laser fabrication more complicated. While the wavelength of 850 nm is the current standard for LAN/SAN applications, potential competitive standards at 980 and 1100 nm have many critical advantages for very and ultra short reach systems. This includes smaller operational voltages due to the lower photon energy, which are decisive for complementary metal oxide semiconductor (CMOS) drivers, transparency of the GaAs substrate, which is important for bottom-emitting lasers, and deeper potential wells, suppressing the escape of injected non-equilibrium carr...

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“…Assuming 10 Gb/s channel data rate would imply that the bandwidth density achievable utilizing motherboard based electrical interconnects is in the order of ∼16 Gb/s/mm. Operating channels at a higher frequency can result in a higher aggregate bandwidth between modules, however, higher channel frequencies are limited by channel dispersion limits, the need for higher number of equalization taps and a consequent increase in the power dissipation [7]. Fig.…”

Section: Current Methodologiesmentioning

confidence: 99%

Chip-to-chip interconnect integration technologies

Zia

Zhang

Yang

et al. 2016

IEICE Electron. Express

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With continuous increase in the off-chip bandwidth requirements, conventional interconnection methodologies are quickly becoming incapable of meeting the demand. Recent progress in silicon interposer and 3D integration technologies seek to alleviate some of these bottlenecks. This paper reviews the evolution of conventional interconnect methodologies and recent progress in platforms allowing high-bandwidth low-energy chip-tochip communication.

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Is 25 Gb/s On-Board Signaling Viable?

Cited by 74 publications

References 24 publications

Linear MIMO equalization for high-speed chip-to-chip communication

Linear MIMO equalization for high-speed chip-to-chip communication

High Speed VCSELs for Optical Interconnects

Chip-to-chip interconnect integration technologies

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