Jitter effects in continuous-time ΣΔ modulators with delayed return-to-zero feedback

Oliaei, O.; Aboushady, Hassan

doi:10.1109/icecs.1998.813338

Cited by 34 publications

(23 citation statements)

References 8 publications

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“…The main disadvantage of CT Σ∆ modulator is its sensitivity to the clock jitter of the feedback Digital-toAnalog Converter (DAC) which is not shaped with the loop filter due to its direct connection to the input node. This clock jitter noise appears as a white noise in the signal band and can limit the modulator performance [2].…”

Section: Introductionmentioning

confidence: 99%

Modeling jitter in Continuous-Time sigma-delta modulators

Ashry

Aboushady

2010

2010 IEEE International Behavioral Modeling and Simulation Workshop

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In this paper, a fast and accurate technique for modeling and simulation of clock jitter in Continuous-Time sigma-delta (Σ∆) modulators is introduced. In addition to its high speed compared to the traditional jitter simulation method, the proposed technique is still continuous-time based which is more convenient than discrete-time based jitter modeling suggested in other publications. Mathematical principle of the proposed technique as well as simulations results are presented and compared to other simulation techniques.

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Section: Introductionmentioning

confidence: 99%

Modeling jitter in Continuous-Time sigma-delta modulators

Ashry

Aboushady

2010

2010 IEEE International Behavioral Modeling and Simulation Workshop

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“…2. The performance of a ΔΣ modulator with an RZ DAC is sensitive to DAC pulse width jitter [14]. For more than a 95 dB DR, the DAC pulse width jitter requirement is about 78 ps RMS , which is calculated from a 100 dB DR.…”

Section: Dac Pulse Generatormentioning

confidence: 99%

A Hybrid Audio ΔΣ Modulator with dB-Linear Gain Control Function

Kim¹

2011

ETRI J

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A hybrid ΔΣ modulator for audio applications is presented in this paper. The pulse generator for digital-toanalog converter alleviates the requirement of the external clock jitter and calibrates the coefficient variation due to a process shift and temperature changes. The input resistor network in the first integrator offers a gain control function in a dB-linear fashion. Also, careful chopper stabilization implementation using return-to-zero scheme in the first continuous-time integrator minimizes both the influence of flicker noise and inflow noise due to chopping. The chip is implemented in a 0.13 μm CMOS technology (I/O devices) and occupies an active area of 0.37 mm 2 . The ΔΣ modulator achieves a dynamic range (A-weighted) of 97.8 dB and a peak signal-to-noise-plus-distortion ratio of 90.0 dB over an audio bandwidth of 20 kHz with a 4.4 mW power consumption from 3.3 V. Also, the gain of the modulator is controlled from -9.5 dB to 8.5 dB, and the performance of the modulator is maintained up to 5 ns RMS external clock jitter.

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“…Pulse-delay jitter does not affect the amount of feedback charge by the active pulse, but rather only changes the frequency response of the modulator loop filter, therefore is not significant either [10,12]. However, pulse-width jitter directly changes the amount of feedback charge from the active pulse, and the error charge is not noise-shaped and directly fed back to the input, which seriously degrades the performance of CTDSM [6,8,9]. Therefore, reducing or eliminating the effects of pulse-width jitter is most important to improve the performance of CTDSM in the presence of clock jitter.…”

Section: Introductionmentioning

confidence: 99%

“…Its standard deviation is denoted as σ CLK J in this paper. Clock jitter effects in CTDSM have been well studied in literature [6,[8][9][10][11][12][13][14][15]. In CTDSM, clock jitter affects the ideal modulator operation in three ways, which is illustrated in Figure 1, considering the general case of a return-to-zero feedback.…”

Section: Introductionmentioning

confidence: 99%

“…Finally, the amount of feedback charge (by the active pulse) is not constant with respect to either the ideal or non-ideal sampling clock cycles, and this is named as pulse-width jitter. It has been studied that pulse-position jitter incurred at the quantizer input may be regarded insignificant due to noise shaping and high loop gain of the modulator [9,10]. Pulse-delay jitter does not affect the amount of feedback charge by the active pulse, but rather only changes the frequency response of the modulator loop filter, therefore is not significant either [10,12].…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators

Chang

Tang

2017

JLPEA

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Abstract:It is well known that continuous-time Delta-Sigma modulators are very sensitive to clock jitter effects. In literature, a number of techniques have been proposed to cope with them. In this brief, we present a detailed review and comparison of the reported techniques. While the effectiveness to reduce clock jitter effects may be of most importance in this comparison, we also consider other performance metrics such as circuit complexity and overhead to implement the technique, power consumption overhead of technique, synthesis complexity incurred in system-level design, extensibility of the technique from single-bit to multi-bit operation, and robustness to process variation. When clock jitter is relatively large, the fixed-width pulse feedback technique is most effective to reduce clock jitter effects among all techniques at high sampling frequency, while switched-capacitor-resistor and switched-shaped current techniques have best performance at medium frequency or below.

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Jitter effects in continuous-time ΣΔ modulators with delayed return-to-zero feedback

Cited by 34 publications

References 8 publications

Modeling jitter in Continuous-Time sigma-delta modulators

Modeling jitter in Continuous-Time sigma-delta modulators

A Hybrid Audio ΔΣ Modulator with dB-Linear Gain Control Function

Review and Comparison of Clock Jitter Noise Reduction Techniques for Lowpass Continuous-Time Delta-Sigma Modulators

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