JVD silicon nitride as tunnel dielectric in p-channel flash memory

She, Min; King, Tsu‐Jae; Hu, Chenming; Zhu, Wenjuan; Luo, Zhijiong; Han, Jin‐Ping; Ma, T.P.

doi:10.1109/55.981316

Cited by 21 publications

(6 citation statements)

References 5 publications

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“…A non-volatile memory device is one that can retain stored information in the absence of power and flash memory is a type of non-volatile memory [1]. Floating-gate flash memory has been successfully developed in the last few decades with continues down-scaling the dimensions of the cell to obtain high data-storage density, high program/erase speeds, low operating voltage and low power consumption [2].…”

Section: Introductionmentioning

confidence: 99%

Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm

et al. 2014

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Flash memory is the most widely used non-volatile memory device nowadays. In order to keep up with the demand for increased memory capacities, flash memory has been continuously scaled to smaller and smaller dimensions. The main benefits of down-scaling cell size and increasing integration are that they enable lower manufacturing cost as well as higher performance. Charge trapping memory is regarded as one of the most promising flash memory technologies as further down-scaling continues. In addition, more and more exploration is investigated with high-k dielectrics implemented in the charge trapping memory. The paper reviews the advanced research status concerning charge trapping memory with high-k dielectrics for the performance improvement. Application of high-k dielectric as charge trapping layer, blocking layer, and tunneling layer is comprehensively discussed accordingly.

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Section: Introductionmentioning

confidence: 99%

Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm

et al. 2014

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“…The rapid growth of Flash memory technology has been motivated by the continuous downscaling of memory cells [50,51]. Starting from the advanced technology generation for charge-trapping Flash devices, the spacing between two adjacent gates became too narrow to arrange the metal gate to overlap the floating gate vertically in minimum feature-sized standard cells [52,53].…”

Section: Introductionmentioning

confidence: 99%

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

Zhao

et al. 2014

Materials

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Oxide materials with large dielectric constants (so-called high-k dielectrics) have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). A novel characterization (pulse capacitance-voltage) method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS) capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future.

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“…Recently, low-barrier, high-K materials such as jet vapour deposited (JVD) silicon nitride, HfO 2 and Al 2 O 3 have been proposed as tunnel or block dielectrics for flash memory devices. Compared to SiO 2 , high-K materials often show a lower electron barrier to the silicon substrate, which can enhance the gate current during program operation and consequently improve program speed [4]. Moreover, at the retention mode, the high dielectric constant from high-K materials makes it feasible to use a substantially thicker (physical thickness) dielectric for reduced gate leakage and raised retention time of flash memory [5,6].…”

Section: Introductionmentioning

confidence: 99%

Program/erase injection current characteristics of a low-voltage low-power NROM using high-K materials as the tunnel dielectric

Cai

Huang

Shan

et al. 2006

Semicond. Sci. Technol.

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The program and erase injection current characteristics of a NROM with SiO 2 , HfO 2 , LaAlO 3 and Al 2 O 3 as the tunnel dielectric, respectively, are studied in this paper. Due to the lower electron and hole energy barriers introduced by LaAlO 3 , both the program and erase injection current densities of the NROM using LaAlO 3 as the tunnel dielectric are increased dramatically. The injection efficiency is also improved significantly, which indicates that the introduction of LaAlO 3 can lower the operation voltage of NROM cells. We show that the bit line voltage can be reduced to 3 V for both program and erase operations of NROM cells with LaAlO 3 of 5 nm and 8 nm equivalent oxide thickness (EOT). This can greatly reduce the additional circuits to generate high voltages in a nonvolatile memory chip, meanwhile maintaining sufficient program/erase (P/E) performance and reliability. Our study also shows that the drain disturb is alleviated during programming and erasing the NROM cell with the LaAlO 3 tunnel dielectric due to the lower operating voltages (V BL = 3 V). Hence a low-voltage low-power NROM flash memory device operation can be achieved by using LaAlO 3 as the tunnel dielectric, due to the enhancement of the P/E injection current.

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JVD silicon nitride as tunnel dielectric in p-channel flash memory

Cited by 21 publications

References 5 publications

Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm

Review on Non-Volatile Memory with High-k Dielectrics: Flash for Generation Beyond 32 nm

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

Program/erase injection current characteristics of a low-voltage low-power NROM using high-K materials as the tunnel dielectric

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