2007
DOI: 10.1016/j.mee.2007.01.249
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Lamellar crystallization of silicon for 3-dimensional integration

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Cited by 8 publications
(5 citation statements)
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“…The solid lamellae have a lateral width of approximately 0.5 m, somewhat smaller than the 0.8 m width observed with 500 nm thick silicon films on fused silica. 5 Note that the overall melt diameter is less than the laser spot size due to the low incident power level used. Figure 3͑b͒ shows a scanning electron micrograph ͑SEM͒ of the sample after removing the oxide cap.…”
Section: Resultsmentioning
confidence: 99%
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“…The solid lamellae have a lateral width of approximately 0.5 m, somewhat smaller than the 0.8 m width observed with 500 nm thick silicon films on fused silica. 5 Note that the overall melt diameter is less than the laser spot size due to the low incident power level used. Figure 3͑b͒ shows a scanning electron micrograph ͑SEM͒ of the sample after removing the oxide cap.…”
Section: Resultsmentioning
confidence: 99%
“…This puts an upper bound of 1 ms on the time required for a partial melt to form, significantly less than the time required for the heat flow to reach a steady state. We have previously observed partial melt formation over a time scale of seconds, 5 and previous theoretical models have dealt with steady state heat flows. 6 Our current result shows that partial melting can occur under nonequilibrium conditions in less than 1 ms.…”
Section: Resultsmentioning
confidence: 99%
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“…The main enabler to this approach is the ability to deposit/grow a semiconductor film on a wafer during the IC manufacturing process using a number of techniques [17,18]. ultimately, this approach may offer the most integrated system but may potentially be limited to a smaller set of applications.…”
Section: Overview Of 3d Integration Technologiesmentioning
confidence: 99%
“…Such conditions produced highly oriented single crystal grains over 10 m in size, with both in-plane and out-ofplane orientations determined by the underlying template. 5 This opened the possibility of fabricating a truly monolithic 3DIC with device quality semiconductor crystals on an amorphous substrate without any seed requirement or any adverse effects to underlying device layers during processing. 3 However, to avoid damage to the underlying device layers of a 3DIC during recrystallization, low temperature techniques such as pulsed laser transient heating must be employed.…”
Section: Introductionmentioning
confidence: 99%