Latent failures due to ESD in CMOS integrated circuits

Greason, W.D.; Kucerovsky, Z.; Chum, K.W.K.

doi:10.1109/ias.1989.96902

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Cited by 5 publications

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“…The evidence is clear that ESD events alter the subsequent ESD threshold of devices either by making them weaker or by stress hardening them [57]- [60]. It is also clear that the major focus by these authors has been the gate oxide as a source of latency.…”

Section: E Latencymentioning

confidence: 99%

Electrostatic discharge in semiconductor devices: an overview

Vinson¹,

Liou²

1998

Proc. IEEE

125

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Electrostatic discharge (ESD) is an event that sends current through an integrated circuit (IC). This paper reviews the impact of ESD on the IC industry and details the four stages of an ESD event: 1) charge generation, 2) charge transfer, 3) device response, and 4) device failure. Topics reviewed are charge generation mechanisms, models for ESD charge transfer, electrical conduction mechanisms, and device damage mechanisms leading to circuit failure.

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Section: E Latencymentioning

confidence: 99%