Limitations on dominant pole pair selection with continuous PI and PID controllers

Dincel, Emre; Söylemez, Mehmet Turan

doi:10.1109/codit.2016.7593655

Cited by 16 publications

(6 citation statements)

References 6 publications

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“…Pole zero cancellation technique is an effective way to compensate undesirable effects posed by the plant poles as arbitrary pole placement (APP) is not recommended to design output feedback controller. The APP method demands higher order controller or use of full state feedback controller after checking the rank of the controllability matrix to be same as system order [21].Finally, the passive components of the compensator have been determined considering availability and ease of use, the resistors𝑅 𝐶1 ́, 𝑅 𝑓3 ́,𝑅 𝑓1 ́, 𝑅 𝑓2 ́, have been selected to be 20kΩ, 1.33kΩ, 25kΩ and 1.1kΩ respectively and the capacitors 𝐶 𝐶1 ́,𝐶 𝐶2 ́,𝐶 𝐶𝑓3 ́have been selected to be 7.1nF, 0.155nF and 2.66nF respectively in the hardware prototype. The frequency response plot of the proposed converter before and after the realisationof controller has been recorded in Fig.…”

Section: Small Signal Modelling and Design Of Controllermentioning

confidence: 99%

“…This controller enjoys the advantages of more freedom in placing the poles and zeros and achieve better stability margin compared to conventional PI controller. Design of k-factor based type III controllers with optimum performance and faster transient response have been presented in [16][17][18].Method of Pole placement for controller design using all accessible state variables are used in [19].PI controller along with sigma delta modulator has been implemented for the converter presented in [20] [24].Restrictions of dominant pole placement (DPP) method of controller is analysed in [21].The control scheme adopted in [23] shapes the auxiliary inductor current for the improvement of dynamic response. Soft-switching quasi-resonant converters (QRC) use active and/or passive resonant networks, in addition to basic components of normal pulse-width-modulation (PWM) converters.…”

Section: Introductionmentioning

confidence: 99%

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Novel Zero-Voltage Zero-Current Transition Buck Converter With Minimal Impact of Active Auxiliary Cell on Overall Dynamics

Pal¹,

Saha

2023

IEEE Access

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This paper presents a novel zero-voltage zero-current transition DC/DC buck converter, which uses an active auxiliary resonant network to achieve soft switching operation of semiconductor switches and soft-recovery of power diodes over wide output power range and offers high efficiency. The auxiliary cell in the proposed converter does not cause any additional current stress on the semiconductor switches and has minimal impact on overall dynamics of the converter. Steady-state performance of the converter has been presented with detailed theoretical analysis of all operating modes. The design of auxiliary cell components and development of small signal model of the converter have been carried out from the mathematical equations depicting its dynamic behaviour. A closed loop voltage mode controller with a type III compensator has been developed for the converter to achieve the desired transient response under the influence of external disturbances. Power loss analysis and superiority of the proposed converter over other conventional configurations are also presented here. Finally, soft-switching behaviour and step-input transient response of the converter are verified by hardware experimentation on a150W, 100 kHz prototype model. The experimental measurements have successfully validated the theoretically predicted behaviour of the converter.INDEX TERMS Buck converter, Soft-switching, Zero current switching (ZCS), Zero voltage switching (ZVS)

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Section: Small Signal Modelling and Design Of Controllermentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Novel Zero-Voltage Zero-Current Transition Buck Converter With Minimal Impact of Active Auxiliary Cell on Overall Dynamics

Pal¹,

Saha

2023

IEEE Access

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“…Dominant pole placement by standard PID controller (parallel form) has been well studied. Effective methods with low overshoot can be found in Hagglund and Astrom (1985), Persson and Astrom (1992), Tang et al (2006), Atherton (2009), Wang et al (2009), Liu et al (2015), and Dincel and Soylemez (2016). Due to its simplicity and ease of use, the method raised by Wang et al (2009) is adopted in this paper.…”

Section: Design Of Dominant Pole Control Systemmentioning

confidence: 99%

Non-overshooting control of linear system by a simple asymptotic gain scheduling method

2019

Transactions of the Institute of Measurement and Control

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In this paper, a simple yet effective method has been raised for non-overshooting control of linear higher order plant. It is based on Posicast control, asymptotic gain scheduling and dominant pole placement by modified proportional-integral-derivative (PID) controllers, including PI-D, I-PD, PI-PD and PD-PID. The control system is composed by two closed-loops, that is, the inner loop where modified PID controllers are used to stabilize the plant by dominant pole placement, and the outer loop where asymptotic gain scheduling is used to shape the non-overshooting step response. Use of the modified PID controllers is the key to secure success of asymptotic gain scheduling, for dominance of the specified poles and phase lag dominant pole control system can be designed by these controllers in the inner loop. Three numerical examples are used to validate the method; results show that a non-overshooting control with relatively short settling time and small undershoot can be realized.

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“…Baskın kutup atama yönteminde, kapalı çevrim sistemin aşım ve yerleşme zamanı gibi performans özellikleri daha çok baskın bölgedeki kutuplar tarafından belirlendiğinden, kapalı çevrim sistemin kutuplarından ikisinin baskın bölgede, kalan kutupların ise mümkün olduğunca baskın kutuplardan uzakta (genellikle 3-5 kat) konumlanması istenir [8]. Bu yöntem etkili bir tasarım yöntemi olsa da, kalan kutuplar baskın kutuplardan yeterince uzağa yerleştirilmezse, kapalı çevrim sistemin geçici hal yanıtını tahmin etmek zorlaşır ve bu durumda istenilen performans özelliklerinin karşılanması garanti edilemez [9].…”

Section: Introductionunclassified

“…Böylece, yerleşme zamanı ve aşım gibi istenilen performans özellikleri karşılanabilmektedir. Bir başka çalışmada, Dincel E ve Söylemez MT tarafından kapalı çevrim sistemin istenilen performans özelliklerini karşılamak için kapalı çevrim sistemin kutuplarından ikisini istenen bir bölgeye atayan ve kalan kutupların ise baskın kutuplardan uzakta konumlanmalarını sağlayan PI ve PID kontrolörleri tasarlanmıştır [31]. Bahsedilen bu çalışmalar sürekli zaman alanında yapılmıştır, fakat ayrık zaman alanında baskın kutup bölgesi atama üzerine bu şekilde bir çalışma bulunmamaktadır.…”

Section: Introductionunclassified

Dominant pole region assignment with discrete time PI, PID and PIR controllers

MAMMADOV¹,

DİNCEL²,

Söylemez³

2022

Pamukkale J Eng Sci

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Bu çalışmada, kapalı çevrim sistemin zaman özelliklerinin istenen aralıkta kalması için baskın kutup bölgesi atama yöntemiyle ayrık zamanlı PI, PID ve PIR kontrolörlerin tasarlanması amaçlanmıştır. Öncelikle, kapalı çevrim sistemin baskın ve baskın olmayan kutuplarının konumlanmaları istenen bölgeler için sınır fonksiyonlarının belirlenmesi anlatılmıştır. Burada, sınır fonksiyonları için, baskın kutupların konumlanması istenen bölge ayrık zaman düzleminde sabit yarıçaplı iki çember ve sabit bir sönüm oranı eğrisi, kalan kutupların konumlanması istenen bölge ise sabit yarıçaplı bir çember kullanılır. Daha sonra, baskın kutup bölgesi atama probleminin çözüm yöntemi ayrık PI kontrolör için verilmiştir. Önerilen yöntem, kontrolörün bir parametresini sabitleyerek (𝐾 𝑝 = 𝑘 𝑝 * ) ayrık PID ve PIR kontrolörler için genişletilmiştir. PIR kontrolörde ek olarak gecikme parametresi ℎ'nin pozitif bir tamsayı olarak seçilmesi ile tasarıma başlanır. Önerilen yöntem, iki sistem üzerinden ayrık PI, PID ve PIR kontrolörler için anlatılmıştır.In this study, it is aimed to design discrete time PI, PID and PIR controllers with the dominant pole region assignment method in order to have time domain characteristics of the closed loop system in the desired interval. First of all, determination of the boundary functions for the regions where the dominant and non-dominant poles of the closedloop system are desired to be located are explained. Here, for the boundary functions, the region where the dominant poles are desired to be located are two circles of constant radius and a constant damping ratio curve in the discrete time domain, and the region where the remaining poles are desired to be located is a circle of constant radius. Then, solution method of dominant pole region assignment problem is given for discrete PI controller. The proposed method is extended for discrete PID and PIR controllers by fixing a parameter of the controller (𝐾 𝑝 = 𝑘 𝑝 * ). In addition, the design starts with selecting the delay parameter ℎ as a positive integer in the PIR controller. The proposed method is demonstrated for discrete PI, PID and PIR controllers via two systems.

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Limitations on dominant pole pair selection with continuous PI and PID controllers

Cited by 16 publications

References 6 publications

Novel Zero-Voltage Zero-Current Transition Buck Converter With Minimal Impact of Active Auxiliary Cell on Overall Dynamics

Novel Zero-Voltage Zero-Current Transition Buck Converter With Minimal Impact of Active Auxiliary Cell on Overall Dynamics

Non-overshooting control of linear system by a simple asymptotic gain scheduling method

Dominant pole region assignment with discrete time PI, PID and PIR controllers

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