Linearity improvement of open-loop NMOS source-follower sample and hold circuits

Low‐power sample and hold circuits using current conveyor analogue switches

“…The input waveform is sampled at the output when switch is ON and the input voltage is held on the capacitor and appears at the output when switch is OFF. Many S/H circuits have been proposed base on different active devices such as diode bridge-based S/H circuits [4][5][6], follower circuit-based S/H circuits in [7][8][9][10], operational transconductance amplifier-based S/H circuits in [11][12][13][14][15], amplifier-based S/H circuits in [16][17][18][19][20][21][22][23], CCII-based S/H circuits in [24,25]. To obtain sampling input signal and holding input signal, there are three techniques to control state of these active devices: the first technique is supplying clocks through bias current sources [2][3][4][5][6], the second technique is supplying clocks at the input of differential pairs [7][8][9][10], and third technique is supplying clock to control switches [11][12][13][14][15][16][17][18][19][20][21][22]…”

“…Many S/H circuits have been proposed base on different active devices such as diode bridge‐based S/H circuits [4–6], follower circuit‐based S/H circuits in [7–10], operational transconductance amplifier‐based S/H circuits in [11–15], amplifier‐based S/H circuits in [16–23], CCII‐based S/H circuits in [24, 25]. To obtain sampling input signal and holding input signal, there are three techniques to control state of these active devices: the first technique is supplying clocks through bias current sources [2–6], the second technique is supplying clocks at the input of differential pairs [7–10], and third technique is supplying clock to control switches [11–25]. Typically, the switch in [11–25] is implemented using metal oxide semiconductor (MOS) transistors and clock signal will be applied through its gate.…”