Logic Gates and Ring Oscillators Based on Ambipolar Nanocrystalline-Silicon TFTs

Subramaniam, Anand Bala; Cantley, Kurtis D.; Vogel, Eric M.

doi:10.1155/2013/525017

Cited by 6 publications

(3 citation statements)

References 29 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…However, setting the number of stages below a critical value degrades the high and low levels of the output. For such a case, the shape of the output waveform becomes more sinusoidal, which is the case of some works [31], [33], [34], [35]. In contrast, the number of stages are usually chosen much larger than the minimum value, i.e.…”

Section: Application Examplesmentioning

confidence: 99%

A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design

Valletta

Demirkol

Maira

et al. 2016

IEEE Trans. Nanotechnology

View full text Add to dashboard Cite

This work introduces a compact DC model developed for Organic Thin Film Transistors (OTFTs) and its SPICE implementation. The model relies on a modified version of the Gradual Channel Approximation (GCA) that takes into account the contact effects, occurring at non-ohmic metal/organic semiconductor junctions, modeling them as reverse biased Schottky diodes. The model also comprises channel length modulation and scalability of drain current with respect to channel length. To show the suitability of the model, we used it to design an inverter and a ring oscillator circuit. Furthermore, an experimental validation of the OTFTs has been done at the level of the single device as well as with a discrete-component setup based on two OTFTs connected into an inverter configuration. The experimental tests were based on OTFTs that use small molecules in binder matrix as an active layer. The experimental data on the fabricated devices have been found in good agreement with SPICE simulation results, paving the way to the use of the model and the device for the design of OTFT-based integrated circuits.

show abstract

Section: Application Examplesmentioning

confidence: 99%

A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design

Valletta

Demirkol

Maira

et al. 2016

IEEE Trans. Nanotechnology

View full text Add to dashboard Cite

show abstract

“…To date, several methods to decrease dimensions of elements of integrated circuits have been developed. One of them is growth of thin films structures [1][2][3][4][5]. The second approach is diffusion or ion doping of required areas of samples or heterostructures and father laser or microwave annealing of dopant and/or radiation defects [6][7][8].…”

Section: Introductionmentioning

confidence: 99%

On Optimization of Manufacturing of an Amplifier to Increase Density of Bipolar Transistor Framework the Amplifier

Pankratov¹,

Bulaeva²

2017

IJOE

View full text Add to dashboard Cite

In this paper we consider a possibility to increase density of bipolar heterotransistor framework an amplifier due to decreasing of their dimensions. The considered approach based on doping of required areas of heterostructure with specific configuration by diffusion or ion implantation. The doping finished by optimized annealing of dopant and/or radiation defects. Analysis of redistribution of dopant with account redistribution of radiation defects (after implantation of ions of dopant) for optimization of the above annealing have been done by using recently introduced analytical approach. The approach gives a possibility to analyze mass and heat transports in a heterostructure without crosslinking of solutions on interfaces between layers of the heterostructure with account nonlinearity of these transports and variation in time of their parameters. KEYWORDS Bipolar heterotransistor; increasing of density of transistor; an amplifier circuit

show abstract

“…In the present time, one can find an increase in the density of elements of integrated circuits due to increase in the density of their dimensions and optimization of technological processes to improve properties of these circuits (Wrachien et al , 2013; Kargarrazi et al , 2016; Pal et al , 2015; Choi and Park, 2011; Senthilpari et al , 2009; Subramaniam et al , 2013). One can also find increase in the speed of these elements.…”

Section: Introductionmentioning

confidence: 99%

On increasing of integration rate of elements in a multi-level inverter

Pankratov

Bulaeva

2017

IJICC

View full text Add to dashboard Cite

Purpose The purpose of this paper is to analyze the redistribution of dopant and radiation defects to determine conditions which correspond to decreasing of elements in the considered inverter and at the same time to increase their density. Design/methodology/approach In this paper, the authors introduce an approach to increase integration rate of elements in a three-level inverter. The approach is based on decrease in the dimension of elements of the inverter (diodes and bipolar transistors) due to manufacturing of these elements by diffusion or ion implantation in a heterostructure with specific configuration and optimization of annealing of dopant and radiation defects. Findings The authors formulate recommendations to increase density of elements of the inverter with a decrease in their dimensions. Practical implications Optimization of manufacturing of integrated circuits and their elements. Originality/value The results of this paper are based on original analysis of transport of dopant with account transport and interaction of radiation defects.

show abstract

Logic Gates and Ring Oscillators Based on Ambipolar Nanocrystalline-Silicon TFTs

Cited by 6 publications

References 29 publications

A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design

A Compact SPICE Model for Organic TFTs and Applications to Logic Circuit Design

On Optimization of Manufacturing of an Amplifier to Increase Density of Bipolar Transistor Framework the Amplifier

On increasing of integration rate of elements in a multi-level inverter

Contact Info

Product

Resources

About