Logic Optimization for Majority Gate-Based Nanoelectronic Circuits Based on Genetic Algorithm

Bonyadi, Mohammad Reza; Azghadi, S. Mostafa Rahimi; Rad, N.M.; Navi, K.; Afjei, E.

doi:10.1109/icee.2007.4287307

Cited by 35 publications

(21 citation statements)

References 6 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…In the second iteration, by removing duplicated inputs in node [3], substituting [3] with [4], and deleting nodes that contain no majority gates, the network becomes f=M(b, [4]', [4]). In the third iteration, this circuit is finally optimized as given in (14).…”

Section: ) [4]=m(0ac')mentioning

confidence: 99%

“…However, these functions are limited to synthesizing three-variable functions. Other approaches that can handle majority logic circuits with more than three variables are proposed in [14][15][16][17][18]. In these methods, standard logic synthesis tools, such as SIS [19], are initially used to decompose the circuit into three-feasible networks.…”

Section: Introductionmentioning

confidence: 99%

See 1 more Smart Citation

Synthesis of Majority/Minority Logic Networks

Wang

Niamat

Vemuru

et al. 2015

IEEE Trans. Nanotechnology

View full text Add to dashboard Cite

As CMOS technology reaches its physical limits, new technologies such as Quantum-dot Cellular Automata (QCA), Single Electron Tunneling (SET) and Tunneling Phase Logic (TPL) are being proposed as alternatives to CMOS technology. These technologies use either majority or minority logic to implement logic functions. Existing majority/minority logic synthesis methods, based on three-feasible networks, often result in sub-optimal solutions. In this paper, an efficient algorithm to find the minimal majority gate mapping, along with a Majority expression Look-Up Table (MLUT) is developed. Based on the MLUT, a comprehensive majority/minority logic synthesis technique is proposed. A redundancy removal method is also developed to further optimize the synthesized circuit. This technique makes effort towards achieving different optimization goals and results in fewer majority gates and fewer levels than previous methods. For the 29 MCNC benchmark circuits, when targeted to optimize the logic levels, there is an average reduction of 7.0% in the number of levels as well as 6.3% in the number of gates. For optimization targeted to reduce gate counts, there is an average reduction of 9.5% in the number of gates as well as 0.8% in the number of levels, as compared to the best available method.Index Terms -logic synthesis, majority gates, quantum-dot cellular automata (QCA) 

show abstract

Section: ) [4]=m(0ac')mentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%

Synthesis of Majority/Minority Logic Networks

Wang

Niamat

Vemuru

et al. 2015

IEEE Trans. Nanotechnology

View full text Add to dashboard Cite

show abstract

“…The main logic gates AND and OR can be performed utilizing the QCA universal gate (majority gate) by setting one of the inputs to 0 and 1 respectively. Majority gate is dominant in the QCA world with several studies focusing on it such as [23][24][25][26][27]. Two configurations of the majority gate are introduced in QCA as illustrated in Figure 3 [28].…”

Section: Introductionmentioning

confidence: 99%

Optimum multiplexer design in quantum-dot cellular automata

Alkaldy

Majeed

Zainal

et al. 2020

IJEECS

View full text Add to dashboard Cite

Quantum-dot Cellular Automata (QCA) is one of the most important computing technologies for the future and will be the alternative candidate for current CMOS technology. QCA is attracting a lot of researchers due to many features such as high speed, small size, and low power consumption. QCA has two main building blocks (majority gate and inverter) used for design any Boolean function. QCA also has an inherent capability that used to design many important gates such as XOR and Multiplexer in optimal form without following any Boolean function. This paper presents a novel design 2:1 QCA-Multiplexer in two forms. The proposed design is very simple, highly efficient and can be used to produce many logical functions. The proposed design output comes from the inherent capabilities of quantum technology. New 4:1 QCA-Multiplexer has been built using the proposed structure. The output waveforms showed the wonderful performance of the proposed design in terms of the number of cells, area, and latency.

show abstract

“…The various algorithms differ mainly in how the initial circuit is preprocessed and decomposed and in how nodes are translated into majority expressions. The algorithms have been further extended [24] to consider technology-aware cost metrics [25], [26] or to consider four inputs in the decomposed nodes [27] and have been optimized using genetic algorithms [28], [29].…”

Section: Introductionmentioning

confidence: 99%

Majority logic synthesis

Amarù

Testa

Couceiro

et al. 2018

Proceedings of the International Conference on Computer-Aided Design

View full text Add to dashboard Cite

The majority function xyz evaluates to true, if at least two of its Boolean inputs evaluate to true. The majority function has frequently been studied as a central primitive in logic synthesis applications for many decades. Knuth refers to the majority function in the last volume of his seminal The Art of Computer Programming as "probably the most important ternary operation in the entire universe." Majority logic sythesis has recently regained signficant interest in the design automation community due to nanoemerging technologies which operate based on the majority function. In addition, majority logic synthesis has successfully been employed in CMOS-based applications such as standard cell or FPGA mapping.This tutorial gives a broad introduction into the field of majority logic synthesis. It will review fundamental results and describe recent contributions from theory, practice, and applications.

show abstract

Logic Optimization for Majority Gate-Based Nanoelectronic Circuits Based on Genetic Algorithm

Cited by 35 publications

References 6 publications

Synthesis of Majority/Minority Logic Networks

Synthesis of Majority/Minority Logic Networks

Optimum multiplexer design in quantum-dot cellular automata

Majority logic synthesis

Contact Info

Product

Resources

About