Low‐Power Memristive Logic Device Enabled by Controllable Oxidation of 2D HfSe₂ for In‐Memory Computing

Abstract

Memristive logic device is a promising unit for beyond von Neumann computing systems and 2D materials are widely used because of their controllable interfacial properties. Most of these 2D memristive devices, however, are made from semiconducting chalcogenides which fail to gate the off‐state current. To this end, a crossbar device using 2D HfSe2 is fabricated, and then the top layers are oxidized into “high‐k” dielectric HfSexOy via oxygen plasma treatment, so that the cell resistance can be remarkably increased. This two‐terminal Ti/HfSexOy/HfSe2/Au device exhibits excellent forming‐free resistive switching performance with high switching speed (<50 ns), low operation voltage (<3 V), large switching window (103), and good data retention. Most importantly, the operation current and the power consumption reach 100 pA and 0.1 fJ to 0.1 pJ, much lower than other HfO based memristors. A functionally complete low‐power Boolean logic is experimentally demonstrated using the memristive device, allowing it in the application of energy‐efficient in‐memory computing.

High‐Performance Memristor Based on 2D Layered BiOI Nanosheet for Low‐Power Artificial Optoelectronic Synapses

“…Table 1 shows the comparison of the RS performance, including SET and RESET voltages, ON/OFF ratio, retention time and endurance cycle between our device with other 2D materials-based memristors. [21][22][23][24][25][26][27][28][29][30][31][32][33][34][35][36][37] It indicates that our device not only possesses relatively high ON/OFF ratio, but also ultralow SET and RESET voltages when compared with previously published works. Inspiringly, the obtained ultralow SET voltage is one order of magnitude lower than that of most reported memristors based on 2D materials.…”

Ternary Logic with Stateful Neural Networks Using a Bilayered TaOX‐Based Memristor Exhibiting Ternary States

“…Before performing that, one can easily estimate if there are possible switching voltage solutions or not from the input state diagram, with decision boundary as shown in Figure 2d. [6] In the diagram, two input conductances (G A and G B ) are assigned to the x and y-axis, and the desired logical output values are plotted corresponding to the gate. [17] By definition, the output of (G A,0 , G B,0 ) should be 0, and As such, one can easily determine if any gate is viable or not just by drawing two boundary lines in the input state diagram as in Figure 2d.…”

“…To address this, in-memory computing (or near-memory computing) techniques that do not require a data bus have received significant interest in efforts to develop next-generation computing. [1][2][3][4] Among the various solutions that have been proposed, [5][6][7] memristive stateful logic is considered quite promising. [8][9][10][11][12][13][14][15][16] It utilizes the resistance values stored in the memristor cells as logical variables and performs logic operations inside the memristor array DOI: 10.1002/advs.202104107 by applying appropriate operating voltages to selected cells.…”

Nonvolatile Resistive Switching in Layered InSe via Electrochemical Cation Diffusion

“…These results are significant, however there remain quite a few areas that need further investigation in the domain of 2D material-based resistive memory technologies. [5,8,[11][12][13][14][15] These include investigations into charge transport mechanisms in vertically stacked van der Waals structures and understanding the role of energy barrier of the van der Waals layers to the out-of-plane cationic and anionic diffusion.Layered InSe is a relatively recently investigated semiconductor from the post-transition metal chalcogenide family. [16] 2D materials are increasingly being investigated for their nonvolatile switching properties as a step toward downscaling of core electronic elements.…”

“…These results are significant, however there remain quite a few areas that need further investigation in the domain of 2D material-based resistive memory technologies. [5,8,[11][12][13][14][15] These include investigations into charge transport mechanisms in vertically stacked van der Waals structures and understanding the role of energy barrier of the van der Waals layers to the out-of-plane cationic and anionic diffusion.…”