Low power successive approximation A/D converter for passive RFID tag sensors

Marjonen, Jouko; Alaoja, R.; Ronkainen, Hannu; Åberg, Markku

doi:10.1109/bec.2006.311072

Cited by 6 publications

(6 citation statements)

References 4 publications

Supporting

Mentioning

Contrasting

Order By: Relevance

“…The only active component in the SAR ADC is the comparator, which was optimised for low power consumption, but also, to provide at the same time sufficient performance for the speed and gain. The measured non linearity was in line with our previous reported work [27]. The non linearity was mostly due to the offset voltage of the comparator.…”

Section: Discussionsupporting

confidence: 83%

“…16, V DD = 2.0 V). INL non linearity, which seems to be periodic, increase more with the offset of the comparator, which is a function of the common mode signal [27], than with the poor matching of the switching transistors in the switching network of the DAC. The influence of the noise on the measurements is discussed in the next subsection.…”

Section: Linearity Measurementsmentioning

confidence: 97%

“…The total output noise PSD of the DAC is formed from (28), (31), (29), (31) and (32) by solving the v out from (27), replacing v in by the noise source (33) due to resistor R i , and summing the output terms together. Because noise sources do not correlate, the superposition principle applies.…”

Section: Estimation Of the Dac Output Noisementioning

confidence: 99%

See 2 more Smart Citations

An 8-bit, 10 kHz, 5.1 μW, 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities

Marjonen

Vermesan

Rustad

2010

Analog Integr Circ Sig Process

Self Cite

View full text Add to dashboard Cite

An 5.1 lW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 lm CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 lW at a 10 kHz input clock with a 1.8 V single supply, and 0.5 lW with 970 mV supply.

show abstract

Section: Discussionsupporting

confidence: 83%

Section: Linearity Measurementsmentioning

confidence: 97%

See 1 more Smart Citation

An 8-bit, 10 kHz, 5.1 μW, 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities

Marjonen

Vermesan

Rustad

2010

Analog Integr Circ Sig Process

Self Cite

View full text Add to dashboard Cite

show abstract

“…Among different types of ADCs, SAR ADC has been mostly used for moderate-speed, moderate-resolution applications [6], because majority of its blocks are digital circuits [4]. SAR ADC estimates the digital value of analog data input similar to Newton's root-finding algorithm.…”

Section: Introductionmentioning

confidence: 99%

“…In general, there are two kinds of tags, active and passive tags [1]. Active tags take energy from battery; give them the ability of long range transmission and performing more sophisticated processes, but, at the cost of being larger, heavier and having limited lifetime [4]. Passive tags take energy from electromagnetic waves emitted by the reader, so they don't need battery and can be very small and very cheap and have unlimited lifetime, but, at the cost of shorter transmission range [2].…”

Section: Introductionmentioning

confidence: 99%

An 8-bit 166nw 11.25 kS/s 0.18um two-Step-SAR ADC for RFID applications using novel DAC architecture

Kianpour¹,

Zou

Nejad³

et al. 2010

Norchip 2010

View full text Add to dashboard Cite

SAR ADCs have been mostly used for moderatespeed, moderate-resolution applications that power consumption is one of the major concerns (e. g. RFID). Furthermore two-step ADCs are classified as high-speed, low to moderate-accuracy ADC. In this paper an ultra low power two-step-SAR ADC for RFID application is presented. Several techniques are used to further reduce the power consumption and relatively elevate the speed of the ADC. These techniques include a low power comparator with no static current and a dual-stage (Resistorstring / capacitive dividing) architecture as digital-to-analog converter (DAC). In this DAC architecture fine search will be performed by only two C and 15C capacitors which reduced the silicon area significantly. The circuit designed in 0.18um CMOS technology and simulations show that the 8-bit ADC, consumes almost 166nW at 11.25kS/s. The results show that the proposed ADC has higher speed with almost the same power consumption in comparison with its charge redistribution counterpart.

show abstract

Force sensor system for structural health monitoring using passive RFID tags

Ikemoto

Suzuki

Okamoto³

et al. 2009

Sensor Review

View full text Add to dashboard Cite

PurposeThe purpose of this paper is to describe the development of a contactless and batteryless loading sensor system that can measure the internal loading of an object structure through several covering materials for structural health monitoring.Design/methodology/approachThe paper proposed an architecture by which two radio frequency identification (RFID) tags are used in the system. It has been difficult to realize sensing by RFID because of the low power supply. To solve the power supply problem, a method using functional distribution of RFID tags of two kinds of RFID for communication and power supply was proposed. One RFID tag is specialized as a power supply for communication of strain loading information through A/D conversion. Another is specialized to supply power for driving the strain gauges bridge circuit.FindingsBy using developed system, the measurement of the structural internal loading with 20.0 mm depth was possible through covering materials such as concrete, but also plaster board, flexible boards, silicate calcium board, blockboard, and polystyrene with a resolution performance from 10 × 10−6 to 40 × 10−6.Originality/valueA sensor system was developed using passive RFID, which enables measurement of load‐deformation information inside a structural object. Moreover, the inexpensive wireless, batteryless devices used in this system require little maintenance, and applications for the user interface are also included in the developed system for uniform management of structural health monitoring. The developed system was evaluated in an actual situation using not only concrete but also other materials as covering materials on a structural object.

show abstract

Low power successive approximation A/D converter for passive RFID tag sensors

Cited by 6 publications

References 4 publications

An 8-bit, 10 kHz, 5.1 μW, 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities

An 8-bit, 10 kHz, 5.1 μW, 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities

An 8-bit 166nw 11.25 kS/s 0.18um two-Step-SAR ADC for RFID applications using novel DAC architecture

Force sensor system for structural health monitoring using passive RFID tags

Contact Info

Product

Resources

About