An 8-bit, 10 kHz, 5.1 μW, 0.18 μm CMOS SAR ADC for RFID applications with sensing capabilities

Abstract

An 5.1 lW, 1.8 V, 8-bit, successive approximation (SAR) analog-to-digital converter (ADC) using 10 kHz clock was designed and fabricated in a 0.18 lm CMOS technology for passive UHF radio frequency identification (RFID) applications. The ADC utilises a resistive digital to analog converter (DAC). The ADC can operate with low power consumption. The proposed comparator with cascode active load can offer large gain and can operate at a low supply voltage. The measured total power consumption is 5.1 lW at a 10 kHz input clock with a 1.8 V single supply, and 0.5 lW with 970 mV supply.

A 9‐bit successive approximation ADC in SOI CMOS operating up to 300 °C

“…Conventional submicron CMOS processes are used in [6][7][8], which support operating voltage down to 1.0 V. But the threshold voltage and mobility of transistors are reducing as the temperature increases. At high temperature, a too low threshold voltage leads to circuit failure.…”

“…A generic setup based on logical analyzer (Agilent 16802A), signal generators (Agilent), and precision power supplies (Hewlett Packard) is built to measure the ADC [6][7][8]. A generic setup based on logical analyzer (Agilent 16802A), signal generators (Agilent), and precision power supplies (Hewlett Packard) is built to measure the ADC [6][7][8].…”

“…The variation of Ibias is primarily reduced by using the temperature insensitive arrangement R 1 + R 2 in the quadratic term in Equation (8). The variation of Ibias is primarily reduced by using the temperature insensitive arrangement R 1 + R 2 in the quadratic term in Equation (8).…”

“…As an example, a simplified underground measurement-while-drilling integrated system is shown in Figure 1, in which data acquisition is performed for various sensing parameters, such as pressure, resistivity, and temperature. Unlike the applications in portable wireless communication systems or biomedical devices [6][7][8], where SAR ADCs are usually targeting extremely small area and very low operating voltage, the biggest challenge for the measurement-while-drilling system is to operate properly at high-temperature (HT) like 200-300°C with reasonably low power consumption. For such an application, regarding power consumption, circuit complexity, and moderate resolution (7-10 bits), successive approximation register analog-to-digital converter (SAR ADC) becomes a good candidate compared with other kinds of ADCs.…”

“…The data are transmitted back to the ground through telemetry, which helps assess drilling progress and the condition of drilling hardware [2,4]. Most SAR ADCs [6][7][8][9] implemented in conventional complementary metal-oxide semiconductor (CMOS) technology operate maximal up to 125°C. Unlike the applications in portable wireless communication systems or biomedical devices [6][7][8], where SAR ADCs are usually targeting extremely small area and very low operating voltage, the biggest challenge for the measurement-while-drilling system is to operate properly at high-temperature (HT) like 200-300°C with reasonably low power consumption.…”