Low-Temperature Cu-Cu Wafer Bonding

Rebhan, Bernhard; Hesser, Günter; Duchoslav, Jiri; Dragoi, Viorel; Wimplinger, Markus; Hingerl, Kurt

doi:10.1149/05007.0139ecst

Cited by 33 publications

(11 citation statements)

References 22 publications

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“…In previous work (4,9) the surface copper oxide was identified using XPS as being CuO. Further, using the same technique as well as high-resolution TEM, it was proven that CuO could be successfully removed from the surfaces.…”

Section: Surface Cleanlinessmentioning

confidence: 95%

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

2014

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Physical mechanism of Cu-Cu wafer bonding was studied as a base for low temperature (<200°C) wafer bonding process optimization. It was found out that for the successful bonding of two copper surfaces the following (classes of) impact factors have to be considered (I) contacting, even at atomic scale, (II) cleanliness of the surface, (III) diffusion enhancing materials properties and (IV) process conditions. From these fundamental findings subsequently low temperature metal thermo-compression Cu-Cu wafer bonding and even room temperature direct bonding was facilitated.

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Section: Surface Cleanlinessmentioning

confidence: 95%

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

2014

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“…Another available method of copper-to-copper bonding is thermocompression bonding (TCB). Copper wafers are bonded and annealed at approximately 400°C to remove copper oxide (Rebhan et al , 2013), and Cu atom interdiffusion achieves grain growth and interface disappearance (Chen et al , 2002; Chen et al , 2003). Excessively high temperatures (∼400°C) damage the electronic circuit structure and cause the potential failure (Tang et al , 2012).…”

Section: Wet Treatment and Plasma-assisted Bondingmentioning

confidence: 99%

Recent progress on bumpless Cu/SiO₂ hybrid bonding for 3D heterogeneous integration

Kang

Niu

et al. 2022

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Purpose Bumpless Cu/SiO2 hybrid bonding, which this paper aims to, is a key technology of three-dimensional (3D) high-density integration to promote the integrated circuits industry’s continuous development, which achieves the stacks of chips vertically connected via through-silicon via. Surface-activated bonding (SAB) and thermal-compression bonding (TCB) are used, but both have some shortcomings. The SAB method is overdemanding in the bonding environment, and the TCB method requires a high temperature to remove copper oxide from surfaces, which increases the thermal budget and grossly damages the fine-pitch device. Design/methodology/approach In this review, methods to prevent and remove copper oxidation in the whole bonding process for a lower bonding temperature, such as wet treatment, plasma surface activation, nanotwinned copper and the metal passivation layer, are investigated. Findings The cooperative bonding method combining wet treatment and plasma activation shows outstanding technological superiority without the high cost and additional necessity of copper passivation in manufacture. Cu/SiO2 hybrid bonding has great potential to effectively enhance the integration density in future 3D packaging for artificial intelligence, the internet of things and other high-density chips. Originality/value To achieve heterogeneous bonding at a lower temperature, the SAB method, chemical treatment and the plasma-assisted bonding method (based on TCB) are used, and surface-enhanced measurements such as nanotwinned copper and the metal passivation layer are also applied to prevent surface copper oxide.

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“…Since the Cu surface was all exposed to the air and treated by water in the bonding process, there was inevitable Cu 2 O layer formation on the Cu surface for all samples. 29,30) Yet it is reported that Cu 2 O would decompose to Cu and O at temperatures higher than 180 °C. 31) Because the Cu dishing (−3.17 nm) of S1 was less than the Cu expansion [5.313 nm @ (25 °C-200 °C), 9.687 nm @ (25 °C-350 °C)], the Cu-Cu interface was well contacted and Cu-Cu diffusion bonding could happen at 200 °C in the first-step annealing.…”

Section: Bonding Surface Study After Furnace Annealingmentioning

confidence: 99%

Cu CMP process development and characterization of Cu dishing with 1.8 μm Cu pad and 3.6 μm pitch in Cu/SiO₂ hybrid bonding

Hu¹,

Qu²,

Lin³

et al. 2019

Jpn. J. Appl. Phys.

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A Cu/SiO2 hybrid bonding process was developed on 1.8 μm Cu pad size and 3.6 μm pitch. A Cu dishing profile was achieved with additional fine copper removal and barrier removal chemical mechanical planarization steps (named P2 rework and P3 rework) due to the different removal rate (RR) of Cu to SiO2. With increasing P2 rework time, the Cu dishing could be increased, because the RR of Cu was larger than that of SiO2. With increasing P3 rework time, the Cu dishing was decreased, which was due to the RR of Cu being lower than that of SiO2. The interface of Cu–Cu bonding with different Cu dishing after 350 °C annealing was studied. By choosing a proper Cu dishing value which is less than the Cu expansion in the 350 °C annealing, the daisy chain resistance per link of 1.2–1.5 Ω and 95% yield of 1000 daisy chain were achieved.

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Low-Temperature Cu-Cu Wafer Bonding

Cited by 33 publications

References 22 publications

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

Recent progress on bumpless Cu/SiO₂ hybrid bonding for 3D heterogeneous integration

Cu CMP process development and characterization of Cu dishing with 1.8 μm Cu pad and 3.6 μm pitch in Cu/SiO₂ hybrid bonding

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Low-Temperature Cu-Cu Wafer Bonding

Cited by 33 publications

References 22 publications

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

Impact Factors on Low Temperature Cu-Cu Wafer Bonding

Recent progress on bumpless Cu/SiO2 hybrid bonding for 3D heterogeneous integration

Cu CMP process development and characterization of Cu dishing with 1.8 μm Cu pad and 3.6 μm pitch in Cu/SiO2 hybrid bonding

Contact Info

Product

Resources

About

Recent progress on bumpless Cu/SiO₂ hybrid bonding for 3D heterogeneous integration

Cu CMP process development and characterization of Cu dishing with 1.8 μm Cu pad and 3.6 μm pitch in Cu/SiO₂ hybrid bonding