Low Temperature Deposition of High-k/Metal Gate Stacks on High-Sn Content (Si)GeSn-Alloys

Schulte-Braucks, C.; Driesch, Nils von den; Glass, Stefan; Tiedemann, A. T.; Breuer, U.; Besmehn, Astrid; Hartmann, Jean‐Michel; Ikonić, Z.; Zhao, Qing‐Tai; Mantl, S.; Buca, D.

doi:10.1021/acsami.6b02425

Cited by 21 publications

(26 citation statements)

References 52 publications

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“…This could generate a huge amount of interface states which degrade the gate stack quality [45]. The Sn oxide could also be detrimental to the GeSn gate stack as SnO 2 is known to exhibit metallic behaviour, which leads to high gate leakage current [46,47]. Therefore, suppressing the Ge and Sn oxides formation is important for achieving good gate quality for Ge 0.83 Sn 0.17 p-MOSFETs.…”

Section: Xps Study On the Effect Of Sulfur Passivationmentioning

confidence: 99%

Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

Lei

Wang

Zhang

et al. 2016

Journal of Applied Physics

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The effect of sulfur passivation of the surface of Ge 0.83 Sn 0.17 is investigated. X-ray photoelectron spectroscopy (XPS) was used to examine the interfacial property between HfO 2 and Ge 0.83 Sn 0.17 . Sulfur passivation is effective in reducing both the Ge oxides and Sn oxides formation and the Sn atoms segregation. In addition, sulfur passivation reduces the interface trap density D it at the HfO 2 /Ge 0.83 Sn 0.17 interface from the valence band edge to the midgap. After the implementation of sulfur passivation, Ge 0.83 Sn 0.17 p-MOSFETs show improved subthreshold swing S and effective hole mobility μ eff . 25% μ eff enhancement can be observed in Ge 0.83 Sn 0.17 p-MOSFETs with sulfur passivation at a high inversion carrier density N inv of 1 × 10 13 cm −2 .

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Section: Xps Study On the Effect Of Sulfur Passivationmentioning

confidence: 99%

Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

Lei

Wang

Zhang

et al. 2016

Journal of Applied Physics

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“…One of the main challenges posed by (Si)GeSn alloys is maintaining their structural integrity during thermal treatment in order to preserve their intrinsic material properties. For example, thermal budget must be specifically kept low enough to avoid Sn diffusion out of the material and associated segregation [8]. This physical process yields a phase separation with the GeSn equilibrium phase at a Sn content well below the critical value for a direct bandgap, rendering it unsuitable for light emitting devices.…”

Section: Introductionmentioning

confidence: 99%

Thermally activated diffusion and lattice relaxation in (Si)GeSn materials

Driesch

Wirths

Troitsch

et al. 2020

Phys. Rev. Materials

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Germanium-Tin (GeSn) alloys have emerged as a promising material for future optoelectronics, energy harvesting and nanoelectronics owing to their direct bandgap and compatibility with existing Si-based electronics. Yet, their metastability poses significant challenges calling for indepth investigations of their thermal behavior. With this perspective, this work addresses the interdiffusion processes throughout thermal annealing of pseudomorphic GeSn binary and SiGeSn ternary alloys. In both systems, the initially pseudomorphic layers are relaxed upon annealing exclusively via thermally induced diffusional mass transfer of Sn. Systematic post-growth annealing experiments reveal enhanced Sn and Si diffusion regimes that manifest at temperatures below 600°C. The amplified low-temperature diffusion and the observation of only subtle differences between binary and ternary hint at the unique metastability of the Si-Ge-Sn material system as the most important driving force for phase separation.

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“…2(b)). A study focusing on the process development and characterization of ternary SiGeSn MOScaps has been published recently [14]. A second fundamental module is contact formation.…”

Section: Methodsmentioning

confidence: 99%

Process modules for GeSn nanoelectronics with high Sn-contents

Schulte-Braucks

Glass

Hofmann

et al. 2017

Solid-State Electronics

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-This paper systematically studies GeSn n-FETs, from individual process modules to a complete device. High-k gate stacks and NiGeSn metallic contacts for source and drain are characterized in independent experiments. To study both direct and indirect bandgap semiconductors, a range of 0 at.% to 14.5 at.% Sn-content GeSn alloys are investigated. Special emphasis is placed on capacitance-voltage (C-V) characteristics and Schottky-barrier optimization. GeSn n-FET devices are presented including temperature dependent I-V characteristics. Finally, as an important step towards implementing GeSn in tunnel-FETs, negative differential resistance in Ge 0.87 Sn 0.13 tunnel-diodes is demonstrated at cryogenic temperatures. The present work provides a base for further optimization of GeSn FETs and novel tunnel FET devices.

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Low Temperature Deposition of High-k/Metal Gate Stacks on High-Sn Content (Si)GeSn-Alloys

Cited by 21 publications

References 52 publications

Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

Ge0.83Sn0.17 p-channel metal-oxide-semiconductor field-effect transistors: Impact of sulfur passivation on gate stack quality

Thermally activated diffusion and lattice relaxation in (Si)GeSn materials

Process modules for GeSn nanoelectronics with high Sn-contents

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