Low temperature GaAs/Si direct wafer bonding

Abstract

GaAs-Si low temperature. bonding fas been achieved using spinon-glass as the intermediate layer. Interface energies of ~1.7J/cm2 were obtained after thermal annealing at only 200°C. The interface energy is sufficiently high to allow thinning of the GaAs wafer down to 5-10 u m. Introduction: Much scientific interest is being focused on the monolithic integration of GaAs optoelectronic devices with high speed silicon integrated circuits. The main requirement for the integration is to combine high quality single crystalline GaAs layers with silicon substrates. A GaAs/Si heterostructure would have the advantage of combiig the properties of both Si and GaAs in order to achieve the integration of GaAs optoelectronic devices with silicon signal processing devices on the same chip and also dissipating higher power than those on GaAs substrates due to the three times higher thermal conductivity of silicon [l]. The main objective is to produce a material system in which a thin GaAs layer showing bulk quality is monolithically integrated on an Si substrate. Usually, GaAs layers are fabricated on Si substrates by heteroepitaxial growth. The formation of anti-phase boundaries, 4.1% lattice mismatch between GaAs and Si, and low temperature epitaxy are major problems encountered in this case [2 ,3] Most of these problems can be avoided by using the direct wafer bonding (DWB) technique [ 4 5] to fabricate GaAs/Si heterostructures. By DWB it is possible either to transfer a singlecrystalline (100) GaAs layer on an Si substrate using for instance hydrogen implantation induced splitting [6], or to integrate silicon in the GaAs technology by transferring silicon layers on GaAs wafers [7]. The most difficult problem which has to be overcome in bonding GaAs to Si is the large difference between the thermal expansion coefficients (TECs) of Si and GaAs (the TEC of GaAs is almost twice that of Si) [8, 9].

GaAs on Si heterostructures obtained by He and/or H implantation and direct wafer bonding

“…Direct bonding of the as-implanted GaAs to Si wafers was performed via a spin-on glass ͑SOG͒ intermediate layer to ensure sufficiently high bonding energies (1.7 J/m 2 ) after low temperature annealing, e.g., 200°C for 10 h. 23 The Si wafers were cleaned before bonding using the standard chemical cleaning procedure with RCA 1 (NH 4 OH:H 2 O 2 :H 2 Oϭ1:1:5) and RCA 2 (HCl:H 2 O 2 :H 2 O ϭ1:1:5) solutions. GaAs wafers were cleaned in 5% HCl to remove any metallic contaminants and then rinsed in deionized water.…”

A Review of Hydrophilic Silicon Wafer Bonding

“…Overall this body of work represents incremental steps in wafer bonding, particularly when reporting the bonding of novel materials to silicon. [101][102][103][104] The next significant stage in direct wafer bonding was the introduction of radical activation in a number of 2006 papers by M. M. R. Howlader, et al 105,106 In order to minimize the subsurface damage, surface sputtering and bulk heating inherent to RIE exposure, wafer pairs were hydrophilically activated by a two-stage process of exposure to a short RIE O 2 plasma followed by N 2 and N radicals. Wafers were then contacted and stored for 24 hours prior to testing to allow room temperature annealing to take place.…”

Si/GaAs heterostructures fabricated by direct wafer bonding

“…By annealing the bonded wafer pairs in nitrogen at temperatures up to 350°C, debonding occurs due to the high stress developed at the interface and sometimes the GaAs wafers shatter. The use of an intermediate SOG layer was recently proposed as a low temperature method for GaAs/Si bonding [9].…”