“…[1][2][3][4][5][6] Thus, if these oxide TFT configurations can be exploited for the CTMs, beneficial memory device characteristics, including non-destructive read-out, high on/off ratio, and stable/uniform program operations, can be obtained. To realize oxide CTMs, various charge trapping layers (CTLs) such as nanoparticles, [7][8][9][10][11][12][13][14][15][16] dielectrics, [5][6][7][8][9][10][11][12][13][14][15][16][17][18] and oxide semiconductors have been employed. 1,2,19,20 Among them, CTM devices using metal nanoparticles are promising candidates for next-generation transparent/flexible memory elements because the trap sites can be precisely determined by controlling the material, size, and areal density of the nanoparticles.…”