2015
DOI: 10.4313/teem.2015.16.4.187
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Low-Temperature Poly-Si TFT Charge Trap Flash Memory with Sputtered ONO and Schottky Junctions

Abstract: A charge-trap flash (CTF) thin film transistor (TFT) memory is proposed at a low-temperature process (≤ 450℃). The memory cell consists of a sputtered oxide-nitride-oxide (ONO) gate dielectric and Schottky barrier (SB) source/drain (S/D) junctions using nickel silicide. These components enable the ultra-low-temperature process to be successfully achieved with the ONO gate stacks that have a substrate temperature of room temperature and S/D junctions that have an annealing temperature of 200℃. The silicidation … Show more

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Cited by 1 publication
(2 citation statements)
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“…[1][2][3][4][5][6] Thus, if these oxide TFT configurations can be exploited for the CTMs, beneficial memory device characteristics, including non-destructive read-out, high on/off ratio, and stable/uniform program operations, can be obtained. To realize oxide CTMs, various charge trapping layers (CTLs) such as nanoparticles, [7][8][9][10][11][12][13][14][15][16] dielectrics, [5][6][7][8][9][10][11][12][13][14][15][16][17][18] and oxide semiconductors have been employed. 1,2,19,20 Among them, CTM devices using metal nanoparticles are promising candidates for next-generation transparent/flexible memory elements because the trap sites can be precisely determined by controlling the material, size, and areal density of the nanoparticles.…”
mentioning
confidence: 99%
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“…[1][2][3][4][5][6] Thus, if these oxide TFT configurations can be exploited for the CTMs, beneficial memory device characteristics, including non-destructive read-out, high on/off ratio, and stable/uniform program operations, can be obtained. To realize oxide CTMs, various charge trapping layers (CTLs) such as nanoparticles, [7][8][9][10][11][12][13][14][15][16] dielectrics, [5][6][7][8][9][10][11][12][13][14][15][16][17][18] and oxide semiconductors have been employed. 1,2,19,20 Among them, CTM devices using metal nanoparticles are promising candidates for next-generation transparent/flexible memory elements because the trap sites can be precisely determined by controlling the material, size, and areal density of the nanoparticles.…”
mentioning
confidence: 99%
“…Furthermore, CTMs employing metal nanoparticles can be operated at a faster programming speed compared with those using dielectric CTLs because of their higher trap efficiency, stronger coupling with the conduction channel, and wider range of available work functions. [11][12][13][14][15][16][17][18][19][20][21] Thus, there have been several studies reporting on CTMs that use metal nanoparticles and an oxide channel layer. In these reports, new materials, 8,9,14 synthesis methods of nanoparticles, 7,11 and fabrication schemes for CTLs have been introduced.…”
mentioning
confidence: 99%