Preparation of Mono-Layered Ag Nanoparticles for Charge-Trap Sites of Memory Thin-Film Transistors Using In-Ga-Zn-O Channel

Abstract

We propose a methodology for the formation of silver (Ag) nanoparticle monolayer as charge trapping layer of nonvolatile memory thin-film transistor using an indium-gallium-zinc oxide semiconductor channel layer. Atomic-layer-deposited Al2O3-amine treatment Ag configuration were employed as tunneling/charge-trap layers, respectively. The memory devices showed wide memory window of 8.0 V, when the gate voltage was swept from −20 to 20 V. The high on/off current ratios of 5.81 × 105 and 1.29 × 103 could be obtained for the memory device, when the program pulse duration was reduced to 1 μs and 5 ns, respectively. The Ag nanoparticle monolayer could be prepared by using the amine-functionalized Al2O3 layer. The areal density of Ag nanoparticle was controlled by modulating the Ag ratio in polystyrene (PS) mixture and optimized at Ag:PS ratio of 5:5.

Charge-trap-assisted flexible nonvolatile memory applications using oxide-semiconductor thin-film transistors

“…ZnO or Ag nano-particles have also been introduced for the discrete shape of CTLs to improve memory retention properties. 73,74) Furthermore, variations in the film thicknesses of the Al 2 O 3 tunneling oxide and ZnO CTL have been investigated to clearly figure out the thickness effects on memory device characteristics. 36) New approaches have provided meaningful advances in one or two characteristics among many requirements, but it is very tough to totally enhance and optimize the memory performance of CT-MTFTs.…”

Synergic Impacts of CF4 Plasma Treatment and Post-thermal Annealing on the Nonvolatile Memory Performance of Charge-Trap-Assisted Memory Thin-Film Transistors Using Al–HfO2 Charge Trap and In–Ga–Zn–O Active Channel Layers

“…Amorphous oxide semiconductors (AOSs) have been attracting much attention as active layers to replace polycrystalline silicon channels for advanced three-dimensional device structures due to various advantages such as high mobility, low-temperature compatibility, and grain-boundary-free uniform natures. − Alternatively, charge-trap-assisted memory thin-film transistors (CTM-TFTs) utilizing AOS channels, in which the charges are stored in localized trap sites within the charge-trap layers (CTLs), can be promising candidates as next-generation nonvolatile memories (NVMs), which are featured to have such advantages as a low operating voltage, excellent operational reliabilities, and compatibility with complementary metal oxide semiconductor technology (CMOS). − With the aim of realizing highly functional nonvolatile CTM-TFTs, various strategies, such as the introduction of high-dielectric-constant (high-k) CTLs, − CTL engineering, − and interfacial treatments between the tunneling layer (TL) and CTL, − have been investigated in order to enhance the program/erase (P/E) efficiencies and NVM reliabilities with improving the CTL trap densities and interfacial qualities. Alternatively, the continuous device scaling urges to further reduce the physical thickness of the gate stacks including the CTL and TL, and hence, the conventional CTM devices employing silicon nitride (Si 3 N 4 ) CTLs have faced the critical limit of a trade-off relationship between P/E speed and memory retention time. , Therefore, to overcome this problem and enhance the memory characteristics in terms of charge-trapping efficiency and equivalent oxide thickness (EOT) scaling, we previously demonstrated the NVM characteristics assisted by charge-trap/detrap events of the CTM-TFTs using oxide semiconductor materials, such as ZnO, − ,− In–Ga–Zn–O, (IGZO), and Hf-doped ZnO, as CTLs. Irrespective of successful demonstrations on previously reported CTM-TFTs employing the oxide channel, the choice of oxide semiconductor CTLs needed to be patterned with a double-layered tunneling oxide to avoid chemical damages induced into the channel layer during the patterning process .…”

Effect of Channel Layer Thickness on Electrical and Thermal Stabilities of High-Mobility Zinc Oxynitride Thin-Film Transistors

“…Because of the lower electron effective mass in ZnON (0.19 m e , where m e is the rest mass of an electron) than in IGZO (0.34 m e ), 3 ZnON TFTs have a higher μ FE compared to conventional IGZO TFTs (μ FE = ∼10-20 cm 2 /V•s). [21][22][23] Furthermore, the inactivated oxygen vacancies by the incorporated nitrogen in ZnON suppress the persistent photoconductivity, which improves the photostability of the TFT under light illumination. 9 Despite these advantages, the electrical stability of the ZnON TFTs must be further improved for practical application.…”