Low voltage four‐quadrant analog multiplier using dynamic threshold MOS transistors

Abstract

Purpose -Real-time multiplication of two analog signals is one of the most important operations in analogue signal processing. Driven by low-power and low-voltage requirements for integrated mixedsignal portable applications, the paper's aim is to propose a novel four-quadrant low-voltage analog multiplier using dynamic threshold MOS transistors (DTMOS). Design/methodology/approach -The SPICE simulations were performed with 0.25 mm technology parameters and results verify the performance of the circuit. The multiplier is simulated at low-supply voltage of^0.5 V. Findings -The proposed multiplier has high linearity and simple structure hence it is suitable for high-performance and low-power analog VLSI applications. Originality/value -A new low-voltage four quadrant analog multiplier using DTMOS circuit topology is presented in the paper.

Bandwidth extension of analog multiplier using dynamic threshold MOS transistor

“…The squaring characteristic of MOS transistor biased in saturation has been exploited in many analog signal processing functions for improving the frequency response of computational structures [6][7][8][9][10][11]. In this work we have modified the multiplier proposed in [11] to increase its bandwidth for high frequency applications without introducing any distortion.The sections of the paper are organized as follows.…”