Low-Voltage P3HT Field-Effect Transistors Fabricated Using High-k Gate Insulators

Abstract

Hafnium silicate (HfSiO 5 ) thin film (ε r = 7.7) and strontium titanate (SrTiO 3 ) thin film (ε r = 12.1) were prepared on a heavily doped n-type silicon wafer by sputtering. Wet-processed P3HT field-effect transistors (FETs) fabricated using the self-assembled monolayer (SAM)-treated HfSiO 5 or SAM-free SrTiO 3 as a gate insulator showed saturated output characteristics at a driving voltage as low as −10 V for HfSiO 5 and −3 V for SrTiO 3 . Hole mobilities of P3HT-FETs fabricated on the HfSiO 5 and the SrTiO 3 were 1.1 × 10 −3 and 5.7 × 10 −3 cm 2 /Vs, respectively.