Material and electrical properties of ultra-shallow p/sup +/-n junctions formed by low-energy ion implantation and rapid thermal annealing

Hong, Shin-Nam; Ruggles, G. A.; Wortman, J. J.; Öztürk, Mehmet C.

doi:10.1109/16.75156

Cited by 47 publications

(22 citation statements)

References 32 publications

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“…First, the threshold damage density ͑TDD͒ for amorphization of Si by Ge ϩ was derived by correlating the measured depths of amorphous Si layers created by 15 and 27 keV Ge implants, reported in Ref. 4, to the corresponding damage density distributions calculated by TAMIX. 10 The TDD values thus derived was about 2.0ϫ10 20 keV/cm 3 , consistent for both cases.…”

Section: Methodsmentioning

confidence: 99%

“…The annealed B profiles have humps that do not appear in the as-recoiled B profiles. The B hump centered in the end-of-range ͑EOR͒ region was observed by many authors, 4,[16][17][18][19][20][21][22] though the microstructure and kinetics of it still remains controversial. [21][22][23][24][25][26] The amorphous/crystalline ͑a/c͒ interfaces predicted by the TA-MIX simulations are also shown in Fig.…”

Section: Effects Of Anneal Ge Dose and Ge Energymentioning

confidence: 97%

“…Ge has been the favorite choice for pre-amorphization of Si to avoid B channeling, because Ge has the advantage of heavy mass. 4 Ge was reported to result in lower sheet resistance than other pre-amorphization choices, such as Si, Ar, and F. 5 In addition, Ge has an infinite solid solubility in Si, and is probably not detrimental to the performance of silicon devices.…”

Section: Introductionmentioning

confidence: 99%

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Recoil implantation method for ultrashallow p+/n junction formation

Liu

Gearhart

Booske

et al. 2000

Journal of Applied Physics

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A recoil implantation technique is investigated for ultrashallow p ϩ /n junction formation. In this method, a 3-35 nm thick B layer is deposited on the wafer by magnetron sputtering. Then a medium energy ͑10-40 keV͒ Ge implant drives the boron atoms into Si by means of ion beam mixing. The remainder of the boron film is chemically etched away prior to the annealing step. Sub-60 nm deep p ϩ /n junctions with sheet resistance less than 1000 ⍀/sq and test diodes with leakage current density below 2 nA/cm 2 have been formed using this method.

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Section: Methodsmentioning

confidence: 99%

Section: Effects Of Anneal Ge Dose and Ge Energymentioning

confidence: 97%

Section: Introductionmentioning

confidence: 99%

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Recoil implantation method for ultrashallow p+/n junction formation

Liu

Gearhart

Booske

et al. 2000

Journal of Applied Physics

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“…However, pre-amorphization implantation creates a damage band, rich in interstitials known as the end-of-range (EOR) defects beyond the amorphous/crystalline (a/c) interface. During the postimplantation activation annealing process, solid phase epitaxial regrowth (SPER) occurs and the EOR defects agglomerate into extended defects (dislocation loops and {311} defects), which can be responsible for junction leakage [6]. Moreover, the dissolution/evolution of these extended defects upon subsequent anneals inject interstitials towards both the surface and the bulk causing dopant diffusion and activation anomalies [7].…”

mentioning

confidence: 99%

Interaction of interstitials with buried amorphous layer in silicon

Oliviero

David

Fichtner

2009

Phys. Status Solidi (c)

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International audienceBuried amorphous layers have been produced in silicon single crystal by lithium implantation at liquid nitrogen temperature and followed by a 400 degrees C annealing. By this process, a wide region, perfectly crystalline and free of any extended defect, is formed ahead of the buried amorphous layer up to the implanted surface. Neon has then been implanted in this front region at high fluence and high temperature (250 degrees C) in order to create bubbles and avoid further amorphization. In the presence of a buried amorphous layer, significant decrease of the extended defect density is observed at the neon end of range region. The results are discussed in terms of interstitial trapping, i.e. the buried amorphous layer acting as an efficient sink for interstitials during recrystallization. (C) 2009 WILEY-VCH Verlag GmbH & Co. KGaA, Weinhei

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“…At present, VLSI and ULSI silicon technologies depend on ion implantation for doping. However, there are limitations on this technique in the formation of shallow boron p-type junctions [5][6][7]. Ion implantation generates defects in silicon, and these defects must be annealed out at high temperatures after the implant.…”

Section: Introductionmentioning

confidence: 99%

Micro-Raman study of stress distribution generated in silicon during proximity rapid thermal diffusion

Nolan¹,

Perova²,

Moore³

et al. 2000

Materials Science and Engineering: B

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Micro-Raman spectroscopy has been used for analysing the thermally induced stress distributions in silicon wafers after proximity rapid thermal diffusion (RTD). A compressive stress was found on the whole silicon wafer after 15 s RTD. After 165 s RTD the distribution of the stress across the wafer was found to be different: compressive at the edge and tensile at the middle. Thermal stress was relieved in the RTD wafers via slip dislocations. These slip dislocations were observed in the product wafers using optical microscopy. Slip lines propagated from the wafer edge to the wafer centre in 8 preferred positions of maximum induced stress. The thermally induced stress and the slip dislocation density increased with time spent at the RTD peak temperature.

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Material and electrical properties of ultra-shallow p/sup +/-n junctions formed by low-energy ion implantation and rapid thermal annealing

Cited by 47 publications

References 32 publications

Recoil implantation method for ultrashallow p+/n junction formation

Recoil implantation method for ultrashallow p+/n junction formation

Interaction of interstitials with buried amorphous layer in silicon

Micro-Raman study of stress distribution generated in silicon during proximity rapid thermal diffusion

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