MATLAB/SIMULINK-based high-level synthesis of discrete-time and continuous-time ΣΔ modulators

Abstract

This paper describes a tool that combines an accurate SIMULINK-based time-domain behavioural simulator with a statistical optimizer for the automated high-level synthesis of Modulators ( Ms). The combination of high accuracy, short CPU time and interoperability of different circuit models together with the efficiency of the optimization engine makes the proposed tool an advantageous alternative for M synthesis. The implementation on the well-known MATLAB/SIMULINK platform brings numerous advantages in terms of data manipulation, flexibility and simulation with other electronic subsystems. Moreover, this is the first tool dealing with the synthesis of Ms using both Discrete-Time (DT) and Continuous-Time (CT) circuit techniques (*) .

Systematic top-down design of reconfigurable ΣΔ modulators for multi-standard transceivers

“…For simulation, Simulink and HSPICE are used at high and device levels, respectively. To use Simulink RDM simulation, a very complete library of RDM behavioral models, with a detailed set of ideal and non-ideal effects, is used [25,26]. For modeling, an equation-based exploration tool for topology refinement, with equations derived in [8,22], is employed.…”

“…1 is then carried out using SIMSIDES [26] coupled to the optimization engine already mentioned. SIMSIDES is a time-domain simulator for RDMs that includes accurate behavioral models for thermal noise, integrator defective settling, distortion, etc.…”

A GUI driven Σ-Δ modulator design, evaluation and measurement tool with a view to practical implementation

“…Thus, several design automation tools for Low-Pass (LP), and Band-Pass (BP) Σ−Δ modulators at the system level were reported in the literature [2]- [4]. The most common approach to automate the design procedure is based on iterative performance optimization via a performance evaluation loop using statistical methods or behavioral simulations for the desired modulator parameters [3], [5], [6]. The other common approach is the automation of the modulator coefficients by optimizing the Noise Transfer Functions (NTF) or Signal Transfer Functions (STF) for the desired design specifications.…”

A design methodology for space-time adapter

“…In [11] authors proposed approaches that use Matlab/Simulink for the system specification and that produce a VHDL RTL architecture of the system. Based on hardware macro generators that use the "generic"/"generate" mechanisms, the synthesis process can be summarized as a block instantiation and block interconnection thanks to memory blocks.…”