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This letter presents a new cascade ΣΔ modulator architecture with unity signal transfer function that avoids the need of digital filtering in the error cancellation logic. The combination of these two aspects make it highly tolerant to noise leakages, very robust to non-linearities of the circuitry and especially suited for low-voltage implementations at low oversampling. Behavioral simulations are presented that demonstrate the higher efficiency of the proposed topology compared to existing cascades intended for wideband applications. Introduction: Many new communication systems have arisen in recent years that demand for high-bandwidth ΣΔ modulators (ΣΔMs) in low-voltage technologies [1]-[3]. Since oversampling must be restricted to low values in wideband applications, a usual design choice in order to achieve the required performance is to employ multi-stage noise shaping (MASH) architectures with multi-bit quantization. These ΣΔ topologies circumvent the stability problems of high-order loops, but are sensitive to quantization noise leakages caused by mismatches between the analog and digital signal processing in the ΣΔ cascade [4]. An alternative ΣΔM architecture that reduces the sensitivity to noise leakages of traditional cascade ΣΔMs is the so-called Sturdy MASH (SMASH) modulator, recently presented in [1].