MATLAB/SIMULINK based time-domain behavioral modeling of multibit sigma-delta converters

Bashir, Mudasir; Patri, Sreehari Rao; Ksr, Krishnaprasad

doi:10.1109/icctict.2016.7514566

Cited by 2 publications

(2 citation statements)

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“…Single-loop, one-bit ƩΔ converters exhibit good accuracy at higher filter orders. Unfortunately, the increase in filter order results in stability issues at the modulator output in terms of low frequency oscillations and large am-plitudes, leading to deterioration of modulator's SNR [21], [22]. Cascaded topologies employ higher-order noise shaping techniques and second order modulator for better stability [21].…”

Section: ʃδ Modulator System Level Design Considerationsmentioning

confidence: 99%

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A 159 μW, Fourth Order, Feedforward, Mutli-bit Sigma Delta Modulator for 100 kHz Bandwidth Image Sensors in 65-nm CMOS Process

Prasad¹,

Patri²,

Bashir³

2018

RADIOENGINEERING

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A fourth-order, three-stage, feedforward cascade sigma-delta modulator (ƩΔM) for CMOS image sensor applications is realized in low leakage, high threshold voltage 65 nm CMOS standard process. A top down CAD methodology is used for the design of building blocks, which involves statistical and simulation optimization at different stages of modulator. The multi-bit ƩΔ architecture employs OTA sharing technique with the dual integrating scheme at the first stage and the gain boosted pseudo-differential class-C inverters as OTAs for the rest two stages for low area and power consumption. The operation of proposed ƩΔM is validated through post-layout simulations, considering worst case. The ƩΔM operates at a power supply of 1-V offering a peak signal-to-ratio of 92 dB and a peak signal-to-noise plus distortion ratio of 89 dB for a signal bandwidth of 100 kHz. The overall power and estimated area consumed by the ƩΔM including auxiliary blocks is 159 µW and 101.2 mm 2 , respectively.

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Section: ʃδ Modulator System Level Design Considerationsmentioning

confidence: 99%

“…The architecture and the block level specifications of Σ∆M are decided by behavioral modeling of the modulator [21][22][23]. In this paper, an optimization based CAD synthesis tool, SIMulink-based SIgma-DElta Simulator (SIM-SIDES) [21], is used for developing the topology for given specifications.…”

Section: ʃδM Architecture Selectionmentioning

confidence: 99%