Mechanism and Modeling of On-Resistance Degradation in n-Type Lateral Diffused Metal–Oxide–Semiconductor Transistors

Abstract

In this study, on-resistance (R on ) degradation induced by hot-carrier injection in n-type lateral diffused metal-oxide-semiconductor transistors with shallow trench isolation (STI) in the drift region is investigated. R on unexpectedly decreases at the beginning of stress, although R on increases as the stress time becomes longer. Experimental data and results of technology computer-aided-design simulations reveal that hot-hole injection and trapping at the STI corner closest to the channel is responsible for the R on reduction. The damage caused by hot-electron injection at the STI edge closest to the drain is responsible for the R on increase. An R on degradation model including the effect of hole trapping and interface trap generation is also discussed and verified with experimental data.

Characteristics and reliability of metal–oxide–semiconductor transistors with various depths of plasma-induced Si recess structure

“…[24][25][26][27] Some other groups claimed that a higher V G value results in greater hot-carrier-induced device degradation. 28,29) Results in Fig. 7 reveal that the V G value at which the maximum hot-carrier-induced device degradation is produced is that at which the peak I sub is produced in our devices.…”