Meeting critical gate linewidth control needs at the 65 nm node

Mahorowala, Arpan P.; Halle, Scott; Gabor, Allen H.; Chu, William; Barberet, Alexandra; Samuels, Donald J.; Abdo, Amr Y.; Tsou, L. Y.; Yan, Wendy; Iseda, Seiji; Patel, Krishna Kumar; Dirahoui, Bachir; Nomura, A.; Ahsan, Ishtiaq; Azam, Faisal; Berg, G.D.; Brendler, Andrew; Zimmerman, Jeffrey J.; Faure, Tom

doi:10.1117/12.659427

Cited by 3 publications

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“…Hence it is very important to accurately measure the gate-length of the MOSFET. It has been shown that there is significant intra-die gate-length variation in sub-micron technologies [3]. The degree of intra-die variation described in [3] is sufficient to cause significant variation in MOSFET terminal characteristics like I ON , threshold voltage (V T ) etc.…”

Section: Introductionmentioning

confidence: 99%

“…It has been shown that there is significant intra-die gate-length variation in sub-micron technologies [3]. The degree of intra-die variation described in [3] is sufficient to cause significant variation in MOSFET terminal characteristics like I ON , threshold voltage (V T ) etc. In has been shown recently that significant intra-die thermal absorption variation is caused by non-optimized rapid thermal anneal (RTA) conditions.…”

Section: Introductionmentioning

confidence: 99%

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Impact of intra-die thermal variation on accurate MOSFET gate-length measurement

Ahsan

Schroder

Nowak

et al. 2009

2009 IEEE/SEMI Advanced Semiconductor Manufacturing Conference

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It is known that significant intra-die thermal absorption variation is caused by non-optimized rapid thermal anneal (RTA) conditions and the variation depends on the local pattern density of various types of exposed stacks of the wafer. This variation can create errors in the electrical measurement MOSFET gate length itself. Two electrical methods for measuring gate length will be discussed, namely, the resistive technique, where a long-wide poly-silicon resistor is used as a normalizing resistor; and the capacitive technique, where a long-wide plate gate capacitor is used as a normalizing capacitor. It is shown, that the capacitive technique is more immune to errors introduced by RTA driven intra-die thermal absorption variation. Methods of minimizing these measurement errors are briefly discussed.

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Section: Introductionmentioning

confidence: 99%

Section: Introductionmentioning

confidence: 99%